Bug Summary

File:.build-ci/../src/nvme-print-stdout-id.c
Warning:line 2565, column 7
Potential leak of memory pointed to by 'workload'

Annotated Source Code

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clang -cc1 -cc1 -triple x86_64-redhat-linux-gnu -O3 -analyze -disable-free -clear-ast-before-backend -disable-llvm-verifier -discard-value-names -main-file-name nvme-print-stdout-id.c -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -mrelocation-model static -mframe-pointer=none -fmath-errno -ffp-contract=on -fno-rounding-math -mconstructor-aliases -funwind-tables=2 -target-cpu x86-64 -tune-cpu generic -debugger-tuning=gdb -fdebug-compilation-dir=/__w/nvme-cli/nvme-cli/.build-ci -fcoverage-compilation-dir=/__w/nvme-cli/nvme-cli/.build-ci -resource-dir /usr/bin/../lib/clang/22 -include /__w/nvme-cli/nvme-cli/.build-ci/nvme-config.h -I nvme.p -I . -I .. -I src -I ../src -I ccan -I ../ccan -I libnvme/src -I ../libnvme/src -I /usr/include/json-c -D _FILE_OFFSET_BITS=64 -D _GNU_SOURCE -U NDEBUG -internal-isystem /usr/bin/../lib/clang/22/include -internal-isystem /usr/local/include -internal-isystem /usr/bin/../lib/gcc/x86_64-redhat-linux/16/../../../../x86_64-redhat-linux/include -internal-externc-isystem /include -internal-externc-isystem /usr/include -std=gnu11 -ferror-limit 19 -fgnuc-version=4.2.1 -fskip-odr-check-in-gmf -fcolor-diagnostics -vectorize-loops -vectorize-slp -analyzer-opt-analyze-headers -analyzer-output=html -faddrsig -fdwarf2-cfi-asm -o /__w/nvme-cli/nvme-cli/.build-ci/scan-results/2026-10-24-125112-639-1 -x c ../src/nvme-print-stdout-id.c
1// SPDX-License-Identifier: GPL-2.0-or-later
2#include <ccan/array_size/array_size.h>
3#include <shared/string-util.h>
4
5#include "cleanup.h"
6#include "nvme-print.h"
7#include "nvme-print-stdout.h"
8
9static const uint8_t zero_uuid[16] = { 0 };
10static const uint8_t invalid_uuid[16] = {[0 ... 15] = 0xff };
11
12static struct shr_table *stdout_id_ctrl_cmic_table(__u8 cmic)
13{
14 struct shr_table *t;
15 __u8 rsvd = NVME_CMIC_MULTI_RSVD(cmic)(((cmic) >> NVME_CMIC_MULTI_RSVD_SHIFT) & NVME_CMIC_MULTI_RSVD_MASK
)
;
16 __u8 ana = NVME_CMIC_MULTI_ANA(cmic)(((cmic) >> NVME_CMIC_MULTI_ANA_SHIFT) & NVME_CMIC_MULTI_ANA_MASK
)
;
17 __u8 sriov = NVME_CMIC_MULTI_SRIOV(cmic)(((cmic) >> NVME_CMIC_MULTI_SRIOV_SHIFT) & NVME_CMIC_MULTI_SRIOV_MASK
)
;
18 __u8 mctl = NVME_CMIC_MULTI_CTRL(cmic)(((cmic) >> NVME_CMIC_MULTI_CTRL_SHIFT) & NVME_CMIC_MULTI_CTRL_MASK
)
;
19 __u8 mp = NVME_CMIC_MULTI_PORT(cmic)(((cmic) >> NVME_CMIC_MULTI_PORT_SHIFT) & NVME_CMIC_MULTI_PORT_MASK
)
;
20
21 t = stdout_bits_table_create();
22 if (!t)
23 return NULL((void*)0);
24
25 if (rsvd)
26 stdout_bits_add(t, "[7:4]", rsvd, "Reserved");
27 stdout_bits_add(t, "[3:3]", ana,
28 ana ? "ANA supported" : "ANA not supported");
29 stdout_bits_add(t, "[2:2]", sriov, sriov ? "SR-IOV" : "PCI");
30 stdout_bits_add(t, "[1:1]", mctl,
31 mctl ? "Multi Controller" : "Single Controller");
32 stdout_bits_add(t, "[0:0]", mp, mp ? "Multi Port" : "Single Port");
33
34 return t;
35}
36
37static struct shr_table *stdout_id_ctrl_oaes_table(__le32 ctrl_oaes)
38{
39 struct shr_table *t;
40 __u32 oaes = le32_to_cpu(ctrl_oaes);
41 __u32 dlpcn = NVME_CTRL_OAES_DLPCN(oaes)(((oaes) >> NVME_CTRL_OAES_DLPCN_SHIFT) & NVME_CTRL_OAES_DLPCN_MASK
)
;
42 __u32 rsvd28 = (oaes & 0x70000000) >> 28;
43 __u32 zdcn = NVME_CTRL_OAES_ZDCN(oaes)(((oaes) >> NVME_CTRL_OAES_ZDCN_SHIFT) & NVME_CTRL_OAES_ZDCN_MASK
)
;
44 __u32 rsvd23 = (oaes >> 23) & 0xf;
45 __u32 rlcc = NVME_CTRL_OAES_RLCC(oaes)(((oaes) >> NVME_CTRL_OAES_RLCC_SHIFT) & NVME_CTRL_OAES_RLCC_MASK
)
;
46 __u32 lhcn = NVME_CTRL_OAES_LHCN(oaes)(((oaes) >> NVME_CTRL_OAES_LHCN_SHIFT) & NVME_CTRL_OAES_LHCN_MASK
)
;
47 __u32 ccrcn = NVME_CTRL_OAES_CCRCN(oaes)(((oaes) >> NVME_CTRL_OAES_CCRCN_SHIFT) & NVME_CTRL_OAES_CCRCN_MASK
)
;
48 __u32 ansan = NVME_CTRL_OAES_ANSAN(oaes)(((oaes) >> NVME_CTRL_OAES_ANSAN_SHIFT) & NVME_CTRL_OAES_ANSAN_MASK
)
;
49 __u32 rsvd18 = (oaes >> 18) & 0x1;
50 __u32 rgcns = NVME_CTRL_OAES_RGCNS(oaes)(((oaes) >> NVME_CTRL_OAES_RGCNS_SHIFT) & NVME_CTRL_OAES_RGCNS_MASK
)
;
51 __u32 tthr = NVME_CTRL_OAES_TTHR(oaes)(((oaes) >> NVME_CTRL_OAES_TTHR_SHIFT) & NVME_CTRL_OAES_TTHR_MASK
)
;
52 __u32 normal_shn = NVME_CTRL_OAES_NNSS(oaes)(((oaes) >> NVME_CTRL_OAES_NNSS_SHIFT) & NVME_CTRL_OAES_NNSS_MASK
)
;
53 __u32 egealpcn = NVME_CTRL_OAES_EGEAN(oaes)(((oaes) >> NVME_CTRL_OAES_EGEAN_SHIFT) & NVME_CTRL_OAES_EGEAN_MASK
)
;
54 __u32 lbasin = NVME_CTRL_OAES_LSIAN(oaes)(((oaes) >> NVME_CTRL_OAES_LSIAN_SHIFT) & NVME_CTRL_OAES_LSIAN_MASK
)
;
55 __u32 plealcn = NVME_CTRL_OAES_PLEAN(oaes)(((oaes) >> NVME_CTRL_OAES_PLEAN_SHIFT) & NVME_CTRL_OAES_PLEAN_MASK
)
;
56 __u32 anacn = NVME_CTRL_OAES_ANACN(oaes)(((oaes) >> NVME_CTRL_OAES_ANACN_SHIFT) & NVME_CTRL_OAES_ANACN_MASK
)
;
57 __u32 rsvd10 = (oaes >> 10) & 0x1;
58 __u32 fan = NVME_CTRL_OAES_FAN(oaes)(((oaes) >> NVME_CTRL_OAES_FAN_SHIFT) & NVME_CTRL_OAES_FAN_MASK
)
;
59 __u32 nace = NVME_CTRL_OAES_NSAN(oaes)(((oaes) >> NVME_CTRL_OAES_NSAN_SHIFT) & NVME_CTRL_OAES_NSAN_MASK
)
;
60 __u32 rsvd0 = oaes & 0xFF;
61
62 t = stdout_bits_table_create();
63 if (!t)
64 return NULL((void*)0);
65
66 stdout_bits_add(t, "[31:31]", dlpcn,
67 "Discovery Log Change Notice %sSupported",
68 dlpcn ? "" : "Not ");
69 if (rsvd28)
70 stdout_bits_add(t, "[30:28]", rsvd28, "Reserved");
71 stdout_bits_add(t, "[27:27]", zdcn,
72 "Zone Descriptor Changed Notices %sSupported",
73 zdcn ? "" : "Not ");
74 if (rsvd23)
75 stdout_bits_add(t, "[26:23]", rsvd23, "Reserved");
76 stdout_bits_add(t, "[22:22]", rlcc,
77 "Rate Limiting Configuration Change Notices %sSupported",
78 rlcc ? "" : "Not ");
79 stdout_bits_add(t, "[21:21]", lhcn,
80 "Lost Host Communication Notices %sSupported",
81 lhcn ? "" : "Not ");
82 stdout_bits_add(t, "[20:20]", ccrcn,
83 "Cross-Controller Reset Completed Notices %sSupported",
84 ccrcn ? "" : "Not ");
85 stdout_bits_add(t, "[19:19]", ansan,
86 "Allocated Namespace Attribute Notices %sSupported",
87 ansan ? "" : "Not ");
88 if (rsvd18)
89 stdout_bits_add(t, "[18:18]", rsvd18, "Reserved");
90 stdout_bits_add(t, "[17:17]", rgcns,
91 "Reachability Groups Change Notices %sSupported",
92 rgcns ? "" : "Not ");
93 stdout_bits_add(t, "[16:16]", tthr,
94 "Temperature Threshold Hysteresis Recovery %sSupported",
95 tthr ? "" : "Not ");
96 stdout_bits_add(t, "[15:15]", normal_shn,
97 "Normal NSS Shutdown Event %sSupported",
98 normal_shn ? "" : "Not ");
99 stdout_bits_add(t, "[14:14]", egealpcn,
100 "Endurance Group Event Aggregate Log Page Change Notice %sSupported",
101 egealpcn ? "" : "Not ");
102 stdout_bits_add(t, "[13:13]", lbasin,
103 "LBA Status Information Notices %sSupported",
104 lbasin ? "" : "Not ");
105 stdout_bits_add(t, "[12:12]", plealcn,
106 "Predictable Latency Event Aggregate Log Change Notices %sSupported",
107 plealcn ? "" : "Not ");
108 stdout_bits_add(t, "[11:11]", anacn,
109 "Asymmetric Namespace Access Change Notices %sSupported",
110 anacn ? "" : "Not ");
111 if (rsvd10)
112 stdout_bits_add(t, "[10:10]", rsvd10, "Reserved");
113 stdout_bits_add(t, "[9:9]", fan,
114 "Firmware Activation Notices %sSupported",
115 fan ? "" : "Not ");
116 stdout_bits_add(t, "[8:8]", nace,
117 "Attached Namespace Attribute Changed Event %sSupported",
118 nace ? "" : "Not ");
119 if (rsvd0)
120 stdout_bits_add(t, "[7:0]", rsvd0, "Reserved");
121
122 return t;
123}
124
125static struct shr_table *stdout_id_ctrl_ctratt_table(__le32 ctrl_ctratt)
126{
127 struct shr_table *t;
128 __u32 ctratt = le32_to_cpu(ctrl_ctratt);
129 __u32 rsvd25 = (ctratt >> 25);
130 __u32 iiellss = NVME_CTRL_CTRATT_IIELLSS(ctratt)(((ctratt) >> NVME_CTRL_CTRATT_IIELLSS_SHIFT) & NVME_CTRL_CTRATT_IIELLSS_MASK
)
;
131 __u32 vms = NVME_CTRL_CTRATT_VMS(ctratt)(((ctratt) >> NVME_CTRL_CTRATT_VMS_SHIFT) & NVME_CTRL_CTRATT_VMS_MASK
)
;
132 __u32 pms = NVME_CTRL_CTRATT_PMS(ctratt)(((ctratt) >> NVME_CTRL_CTRATT_PMS_SHIFT) & NVME_CTRL_CTRATT_PMS_MASK
)
;
133 __u32 pls = NVME_CTRL_CTRATT_PLS(ctratt)(((ctratt) >> NVME_CTRL_CTRATT_PLS_SHIFT) & NVME_CTRL_CTRATT_PLS_MASK
)
;
134 __u32 fdps = NVME_CTRL_CTRATT_FDPS(ctratt)(((ctratt) >> NVME_CTRL_CTRATT_FDPS_SHIFT) & NVME_CTRL_CTRATT_FDPS_MASK
)
;
135 __u32 rhii = NVME_CTRL_CTRATT_RHII(ctratt)(((ctratt) >> NVME_CTRL_CTRATT_RHII_SHIFT) & NVME_CTRL_CTRATT_RHII_MASK
)
;
136 __u32 hmbr = NVME_CTRL_CTRATT_HMBR(ctratt)(((ctratt) >> NVME_CTRL_CTRATT_HMBR_SHIFT) & NVME_CTRL_CTRATT_HMBR_MASK
)
;
137 __u32 mem = NVME_CTRL_CTRATT_MEM(ctratt)(((ctratt) >> NVME_CTRL_CTRATT_MEM_SHIFT) & NVME_CTRL_CTRATT_MEM_MASK
)
;
138 __u32 elbas = NVME_CTRL_CTRATT_ELBAS(ctratt)(((ctratt) >> NVME_CTRL_CTRATT_ELBAS_SHIFT) & NVME_CTRL_CTRATT_ELBAS_MASK
)
;
139 __u32 dnvms = NVME_CTRL_CTRATT_DNVMS(ctratt)(((ctratt) >> NVME_CTRL_CTRATT_DNVMS_SHIFT) & NVME_CTRL_CTRATT_DNVMS_MASK
)
;
140 __u32 deg = NVME_CTRL_CTRATT_DEG(ctratt)(((ctratt) >> NVME_CTRL_CTRATT_DEG_SHIFT) & NVME_CTRL_CTRATT_DEG_MASK
)
;
141 __u32 vcm = NVME_CTRL_CTRATT_VCM(ctratt)(((ctratt) >> NVME_CTRL_CTRATT_VCM_SHIFT) & NVME_CTRL_CTRATT_VCM_MASK
)
;
142 __u32 fcm = NVME_CTRL_CTRATT_FCM(ctratt)(((ctratt) >> NVME_CTRL_CTRATT_FCM_SHIFT) & NVME_CTRL_CTRATT_FCM_MASK
)
;
143 __u32 mds = NVME_CTRL_CTRATT_MDS(ctratt)(((ctratt) >> NVME_CTRL_CTRATT_MDS_SHIFT) & NVME_CTRL_CTRATT_MDS_MASK
)
;
144 __u32 ulist = NVME_CTRL_CTRATT_ULIST(ctratt)(((ctratt) >> NVME_CTRL_CTRATT_ULIST_SHIFT) & NVME_CTRL_CTRATT_ULIST_MASK
)
;
145 __u32 sqa = NVME_CTRL_CTRATT_SQA(ctratt)(((ctratt) >> NVME_CTRL_CTRATT_SQA_SHIFT) & NVME_CTRL_CTRATT_SQA_MASK
)
;
146 __u32 ng = NVME_CTRL_CTRATT_NG(ctratt)(((ctratt) >> NVME_CTRL_CTRATT_NG_SHIFT) & NVME_CTRL_CTRATT_NG_MASK
)
;
147 __u32 tbkas = NVME_CTRL_CTRATT_TBKAS(ctratt)(((ctratt) >> NVME_CTRL_CTRATT_TBKAS_SHIFT) & NVME_CTRL_CTRATT_TBKAS_MASK
)
;
148 __u32 plm = NVME_CTRL_CTRATT_PLM(ctratt)(((ctratt) >> NVME_CTRL_CTRATT_PLM_SHIFT) & NVME_CTRL_CTRATT_PLM_MASK
)
;
149 __u32 egs = NVME_CTRL_CTRATT_EGS(ctratt)(((ctratt) >> NVME_CTRL_CTRATT_EGS_SHIFT) & NVME_CTRL_CTRATT_EGS_MASK
)
;
150 __u32 rrlvls = NVME_CTRL_CTRATT_RRLVLS(ctratt)(((ctratt) >> NVME_CTRL_CTRATT_RRLVLS_SHIFT) & NVME_CTRL_CTRATT_RRLVLS_MASK
)
;
151 __u32 nsets = NVME_CTRL_CTRATT_NSETS(ctratt)(((ctratt) >> NVME_CTRL_CTRATT_NSETS_SHIFT) & NVME_CTRL_CTRATT_NSETS_MASK
)
;
152 __u32 nopspm = NVME_CTRL_CTRATT_NOPSPM(ctratt)(((ctratt) >> NVME_CTRL_CTRATT_NOPSPM_SHIFT) & NVME_CTRL_CTRATT_NOPSPM_MASK
)
;
153 __u32 hids = NVME_CTRL_CTRATT_HIDS(ctratt)(((ctratt) >> NVME_CTRL_CTRATT_HIDS_SHIFT) & NVME_CTRL_CTRATT_HIDS_MASK
)
;
154
155 t = stdout_bits_table_create();
156 if (!t)
157 return NULL((void*)0);
158
159 if (rsvd25)
160 stdout_bits_add(t, "[31:25]", rsvd25, "Reserved");
161 stdout_bits_add(t, "[24:23]", iiellss, "Idle I/O Exit Latency Limit %s",
162 !iiellss ? "Not Supported" :
163 iiellss == NVME_CTRL_CTRATT_IIELLSS_POWER_STATE ?
164 "Supported (Power state)" :
165 iiellss == NVME_CTRL_CTRATT_IIELLSS_GLOBAL ?
166 "Supported (Global)" : "Reserved");
167 stdout_bits_add(t, "[22:22]", vms, "Voltage Measurement %sSupported",
168 vms ? "" : "Not ");
169 stdout_bits_add(t, "[21:21]", pms, "Power Measurement %sSupported",
170 pms ? "" : "Not ");
171 stdout_bits_add(t, "[20:20]", pls, "Power Limit %sSupported",
172 pls ? "" : "Not ");
173 stdout_bits_add(t, "[19:19]", fdps,
174 "Flexible Data Placement %sSupported",
175 fdps ? "" : "Not ");
176 stdout_bits_add(t, "[18:18]", rhii,
177 "Reservations and Host Identifier Interaction %sSupported",
178 rhii ? "" : "Not ");
179 stdout_bits_add(t, "[17:17]", hmbr,
180 "HMB Restrict Non-Operational Power State Access %sSupported",
181 hmbr ? "" : "Not ");
182 stdout_bits_add(t, "[16:16]", mem,
183 "MDTS and Size Limits Exclude Metadata %sSupported",
184 mem ? "" : "Not ");
185 stdout_bits_add(t, "[15:15]", elbas, "Extended LBA Formats %sSupported",
186 elbas ? "" : "Not ");
187 stdout_bits_add(t, "[14:14]", dnvms, "Delete NVM Set %sSupported",
188 dnvms ? "" : "Not ");
189 stdout_bits_add(t, "[13:13]", deg, "Delete Endurance Group %sSupported",
190 deg ? "" : "Not ");
191 stdout_bits_add(t, "[12:12]", vcm,
192 "Variable Capacity Management %sSupported",
193 vcm ? "" : "Not ");
194 stdout_bits_add(t, "[11:11]", fcm,
195 "Fixed Capacity Management %sSupported",
196 fcm ? "" : "Not ");
197 stdout_bits_add(t, "[10:10]", mds, "Multi Domain Subsystem %sSupported",
198 mds ? "" : "Not ");
199 stdout_bits_add(t, "[9:9]", ulist, "UUID List %sSupported",
200 ulist ? "" : "Not ");
201 stdout_bits_add(t, "[8:8]", sqa, "SQ Associations %sSupported",
202 sqa ? "" : "Not ");
203 stdout_bits_add(t, "[7:7]", ng, "Namespace Granularity %sSupported",
204 ng ? "" : "Not ");
205 stdout_bits_add(t, "[6:6]", tbkas,
206 "Traffic Based Keep Alive %sSupported",
207 tbkas ? "" : "Not ");
208 stdout_bits_add(t, "[5:5]", plm, "Predictable Latency Mode %sSupported",
209 plm ? "" : "Not ");
210 stdout_bits_add(t, "[4:4]", egs, "Endurance Groups %sSupported",
211 egs ? "" : "Not ");
212 stdout_bits_add(t, "[3:3]", rrlvls, "Read Recovery Levels %sSupported",
213 rrlvls ? "" : "Not ");
214 stdout_bits_add(t, "[2:2]", nsets, "NVM Sets %sSupported",
215 nsets ? "" : "Not ");
216 stdout_bits_add(t, "[1:1]", nopspm,
217 "Non-Operational Power State Permissive %sSupported",
218 nopspm ? "" : "Not ");
219 stdout_bits_add(t, "[0:0]", hids, "128-bit Host Identifier %sSupported",
220 hids ? "" : "Not ");
221
222 return t;
223}
224
225static struct shr_table *stdout_id_ctrl_bpcap_table(__u8 ctrl_bpcap)
226{
227 struct shr_table *t;
228 __u8 rsvd3 = (ctrl_bpcap >> 3);
229 __u8 sfbpwps = NVME_GET(ctrl_bpcap, CTRL_BPCAP_SFBPWPS)(((ctrl_bpcap) >> NVME_CTRL_BPCAP_SFBPWPS_SHIFT) & NVME_CTRL_BPCAP_SFBPWPS_MASK
)
;
230 __u8 rpmbbpwps = NVME_GET(ctrl_bpcap, CTRL_BPCAP_RPMBBPWPS)(((ctrl_bpcap) >> NVME_CTRL_BPCAP_RPMBBPWPS_SHIFT) &
NVME_CTRL_BPCAP_RPMBBPWPS_MASK)
;
231 static const char * const rpmbbpwps_def[] = {
232 "Support Not Specified",
233 "Not Supported",
234 "Supported",
235 "Reserved"
236 };
237
238 t = stdout_bits_table_create();
239 if (!t)
240 return NULL((void*)0);
241
242 if (rsvd3)
243 stdout_bits_add(t, "[7:3]", rsvd3, "Reserved");
244 stdout_bits_add(t, "[2:2]", sfbpwps,
245 "Set Features Boot Partition Write Protection %sSupported",
246 sfbpwps ? "" : "Not ");
247 stdout_bits_add(t, "[1:0]", rpmbbpwps,
248 "RPMB Boot Partition Write Protection %s",
249 rpmbbpwps_def[rpmbbpwps]);
250
251 return t;
252}
253
254static struct shr_table *stdout_id_ctrl_chsi_table(__u8 ctrl_chsi)
255{
256 struct shr_table *t;
257 __u8 rsvd1 = (ctrl_chsi >> 1);
258 __u8 chs = NVME_CTRL_CHSI_CHS(ctrl_chsi)(((ctrl_chsi) >> NVME_CTRL_CHSI_CHS_SHIFT) & NVME_CTRL_CHSI_CHS_MASK
)
;
259
260 t = stdout_bits_table_create();
261 if (!t)
262 return NULL((void*)0);
263
264 if (rsvd1)
265 stdout_bits_add(t, "[7:1]", rsvd1, "Reserved");
266 stdout_bits_add(t, "[0:0]", chs,
267 "CXL HDM %sSupported", chs ? "" : "Not ");
268
269 return t;
270}
271
272static struct shr_table *stdout_id_ctrl_rmdca_table(__u8 ctrl_rmdca)
273{
274 struct shr_table *t;
275 __u8 rsvd3 = (ctrl_rmdca >> 3);
276 __u8 rdccs = NVME_CTRL_RMDCA_RDCCS(ctrl_rmdca)(((ctrl_rmdca) >> NVME_CTRL_RMDCA_RDCCS_SHIFT) & NVME_CTRL_RMDCA_RDCCS_MASK
)
;
277 __u8 rdncs = NVME_CTRL_RMDCA_RDNCS(ctrl_rmdca)(((ctrl_rmdca) >> NVME_CTRL_RMDCA_RDNCS_SHIFT) & NVME_CTRL_RMDCA_RDNCS_MASK
)
;
278 __u8 rdscs = NVME_CTRL_RMDCA_RDSCS(ctrl_rmdca)(((ctrl_rmdca) >> NVME_CTRL_RMDCA_RDSCS_SHIFT) & NVME_CTRL_RMDCA_RDSCS_MASK
)
;
279
280 t = stdout_bits_table_create();
281 if (!t)
282 return NULL((void*)0);
283
284 if (rsvd3)
285 stdout_bits_add(t, "[7:3]", rsvd3, "Reserved");
286 stdout_bits_add(t, "[2:2]", rdccs,
287 "Restore Default Capacity Management Configuration %sSupported",
288 rdccs ? "" : "Not ");
289 stdout_bits_add(t, "[1:1]", rdncs,
290 "Restore Default Namespace Configuration %sSupported",
291 rdncs ? "" : "Not ");
292 stdout_bits_add(t, "[0:0]", rdscs,
293 "Restore Default NVM Subsystem Configuration %sSupported",
294 rdscs ? "" : "Not ");
295
296 return t;
297}
298
299static struct shr_table *stdout_id_ctrl_plsi_table(__u8 ctrl_plsi)
300{
301 struct shr_table *t;
302 __u8 rsvd2 = (ctrl_plsi >> 2);
303 __u8 plsfq = NVME_GET(ctrl_plsi, CTRL_PLSI_PLSFQ)(((ctrl_plsi) >> NVME_CTRL_PLSI_PLSFQ_SHIFT) & NVME_CTRL_PLSI_PLSFQ_MASK
)
;
304 __u8 plsepf = NVME_GET(ctrl_plsi, CTRL_PLSI_PLSEPF)(((ctrl_plsi) >> NVME_CTRL_PLSI_PLSEPF_SHIFT) & NVME_CTRL_PLSI_PLSEPF_MASK
)
;
305
306 t = stdout_bits_table_create();
307 if (!t)
308 return NULL((void*)0);
309
310 if (rsvd2)
311 stdout_bits_add(t, "[7:2]", rsvd2, "Reserved");
312 stdout_bits_add(t, "[1:1]", plsfq,
313 "Power Loss Signaling with Forced Quiescence %sSupported",
314 plsfq ? "" : "Not ");
315 stdout_bits_add(t, "[0:0]", plsepf,
316 "Power Loss Signaling with Emergency Power Fail %sSupported",
317 plsepf ? "" : "Not ");
318
319 return t;
320}
321
322static struct shr_table *stdout_id_ctrl_crcap_table(__u8 ctrl_crcap)
323{
324 struct shr_table *t;
325 __u8 rsvd2 = (ctrl_crcap >> 2);
326 __u8 rgidc = NVME_GET(ctrl_crcap, CTRL_CRCAP_RGIDC)(((ctrl_crcap) >> NVME_CTRL_CRCAP_RGIDC_SHIFT) & NVME_CTRL_CRCAP_RGIDC_MASK
)
;
327 __u8 rrsup = NVME_GET(ctrl_crcap, CTRL_CRCAP_RRSUP)(((ctrl_crcap) >> NVME_CTRL_CRCAP_RRSUP_SHIFT) & NVME_CTRL_CRCAP_RRSUP_MASK
)
;
328
329 t = stdout_bits_table_create();
330 if (!t)
331 return NULL((void*)0);
332
333 if (rsvd2)
334 stdout_bits_add(t, "[7:2]", rsvd2, "Reserved");
335 stdout_bits_add(t, "[1:1]", rgidc,
336 "RGRPID %s while the namespace is attached to any controller.",
337 rgidc ? "does not change" : "may change");
338 stdout_bits_add(t, "[0:0]", rrsup, "Reachability Reporting %sSupported",
339 rrsup ? "" : "Not ");
340
341 return t;
342}
343
344static struct shr_table *stdout_id_ctrl_cntrltype_table(__u8 cntrltype)
345{
346 struct shr_table *t;
347 __u8 rsvd = (cntrltype & 0xFC) >> 2;
348 __u8 cntrl = cntrltype & 0x3;
349
350 static const char * const type[] = {
351 "Controller type not reported",
352 "I/O Controller",
353 "Discovery Controller",
354 "Administrative Controller"
355 };
356
357 t = stdout_bits_table_create();
358 if (!t)
359 return NULL((void*)0);
360
361 stdout_bits_add(t, "[7:2]", rsvd, "Reserved");
362 stdout_bits_add(t, "[1:0]", cntrltype, "%s", type[cntrl]);
363
364 return t;
365}
366
367static struct shr_table *stdout_id_ctrl_nvmsr_table(__u8 nvmsr)
368{
369 struct shr_table *t;
370 __u8 rsvd = (nvmsr >> 2) & 0xfc;
371 __u8 nvmee = NVME_CTRL_NVMSR_NVMEE(nvmsr)(((nvmsr) >> NVME_CTRL_NVMSR_NVMEE_SHIFT) & NVME_CTRL_NVMSR_NVMEE_MASK
)
;
372 __u8 nvmesd = NVME_CTRL_NVMSR_NVMESD(nvmsr)(((nvmsr) >> NVME_CTRL_NVMSR_NVMESD_SHIFT) & NVME_CTRL_NVMSR_NVMESD_MASK
)
;
373
374 t = stdout_bits_table_create();
375 if (!t)
376 return NULL((void*)0);
377
378 if (rsvd)
379 stdout_bits_add(t, "[7:2]", rsvd, "Reserved");
380 stdout_bits_add(t, "[1:1]", nvmee,
381 "NVM subsystem %spart of an Enclosure",
382 nvmee ? "" : "Not ");
383 stdout_bits_add(t, "[0:0]", nvmesd,
384 "NVM subsystem %spart of a Storage Device",
385 nvmesd ? "" : "Not ");
386
387 return t;
388}
389
390static struct shr_table *stdout_id_ctrl_vwci_table(__u8 vwci)
391{
392 struct shr_table *t;
393 __u8 vwcrv = NVME_CTRL_VWCI_VWCRV(vwci)(((vwci) >> NVME_CTRL_VWCI_VWCRV_SHIFT) & NVME_CTRL_VWCI_VWCRV_MASK
)
;
394 __u8 vwcr = NVME_CTRL_VWCI_VWCR(vwci)(((vwci) >> NVME_CTRL_VWCI_VWCR_SHIFT) & NVME_CTRL_VWCI_VWCR_MASK
)
;
395
396 t = stdout_bits_table_create();
397 if (!t)
398 return NULL((void*)0);
399
400 stdout_bits_add(t, "[7:7]", vwcrv,
401 "VPD Write Cycles Remaining field is %svalid.",
402 vwcrv ? "" : "Not ");
403 stdout_bits_add(t, "[6:0]", vwcr, "VPD Write Cycles Remaining");
404
405 return t;
406}
407
408static struct shr_table *stdout_id_ctrl_mec_table(__u8 mec)
409{
410 struct shr_table *t;
411 __u8 rsvd = (mec >> 2) & 0xfc;
412 __u8 pcieme = (mec >> 1) & 0x1;
413 __u8 smbusme = mec & 0x1;
414
415 t = stdout_bits_table_create();
416 if (!t)
417 return NULL((void*)0);
418
419 if (rsvd)
420 stdout_bits_add(t, "[7:2]", rsvd, "Reserved");
421 stdout_bits_add(t, "[1:1]", pcieme,
422 "NVM subsystem %scontains a Management Endpoint on a PCIe port",
423 pcieme ? "" : "Not ");
424 stdout_bits_add(t, "[0:0]", smbusme,
425 "NVM subsystem %scontains a Management Endpoint on an SMBus/I2C port",
426 smbusme ? "" : "Not ");
427
428 return t;
429}
430
431static struct shr_table *stdout_id_ctrl_oacs_table(__le16 ctrl_oacs)
432{
433 struct shr_table *t;
434 __u16 oacs = le16_to_cpu(ctrl_oacs);
435 __u16 rsvd = (oacs & 0xC000) >> 14;
436 __u16 ccfls = NVME_CTRL_OACS_CCFLS(oacs)(((oacs) >> NVME_CTRL_OACS_CCFLS_SHIFT) & NVME_CTRL_OACS_CCFLS_MASK
)
;
437 __u16 enss = NVME_CTRL_OACS_ENSS(oacs)(((oacs) >> NVME_CTRL_OACS_ENSS_SHIFT) & NVME_CTRL_OACS_ENSS_MASK
)
;
438 __u16 hmlms = NVME_CTRL_OACS_HMLMS(oacs)(((oacs) >> NVME_CTRL_OACS_HMLMS_SHIFT) & NVME_CTRL_OACS_HMLMS_MASK
)
;
439 __u16 lock = NVME_CTRL_OACS_CFLS(oacs)(((oacs) >> NVME_CTRL_OACS_CFLS_SHIFT) & NVME_CTRL_OACS_CFLS_MASK
)
;
440 __u16 glbas = NVME_CTRL_OACS_GLSS(oacs)(((oacs) >> NVME_CTRL_OACS_GLSS_SHIFT) & NVME_CTRL_OACS_GLSS_MASK
)
;
441 __u16 dbc = NVME_CTRL_OACS_DBCS(oacs)(((oacs) >> NVME_CTRL_OACS_DBCS_SHIFT) & NVME_CTRL_OACS_DBCS_MASK
)
;
442 __u16 vir = NVME_CTRL_OACS_VMS(oacs)(((oacs) >> NVME_CTRL_OACS_VMS_SHIFT) & NVME_CTRL_OACS_VMS_MASK
)
;
443 __u16 nmi = NVME_CTRL_OACS_NSRS(oacs)(((oacs) >> NVME_CTRL_OACS_NSRS_SHIFT) & NVME_CTRL_OACS_NSRS_MASK
)
;
444 __u16 dir = NVME_CTRL_OACS_DIRS(oacs)(((oacs) >> NVME_CTRL_OACS_DIRS_SHIFT) & NVME_CTRL_OACS_DIRS_MASK
)
;
445 __u16 sft = NVME_CTRL_OACS_DSTS(oacs)(((oacs) >> NVME_CTRL_OACS_DSTS_SHIFT) & NVME_CTRL_OACS_DSTS_MASK
)
;
446 __u16 nsm = NVME_CTRL_OACS_NMS(oacs)(((oacs) >> NVME_CTRL_OACS_NMS_SHIFT) & NVME_CTRL_OACS_NMS_MASK
)
;
447 __u16 fwc = NVME_CTRL_OACS_FWDS(oacs)(((oacs) >> NVME_CTRL_OACS_FWDS_SHIFT) & NVME_CTRL_OACS_FWDS_MASK
)
;
448 __u16 fmt = NVME_CTRL_OACS_FNVMS(oacs)(((oacs) >> NVME_CTRL_OACS_FNVMS_SHIFT) & NVME_CTRL_OACS_FNVMS_MASK
)
;
449 __u16 sec = NVME_CTRL_OACS_SSRS(oacs)(((oacs) >> NVME_CTRL_OACS_SSRS_SHIFT) & NVME_CTRL_OACS_SSRS_MASK
)
;
450
451 t = stdout_bits_table_create();
452 if (!t)
453 return NULL((void*)0);
454
455 if (rsvd)
456 stdout_bits_add(t, "[15:14]", rsvd, "Reserved");
457 stdout_bits_add(t, "[13:13]", ccfls,
458 "Ctrl-scoped Command/Feature Lockdown %sSupported",
459 ccfls ? "" : "Not ");
460 stdout_bits_add(t, "[12:12]", enss,
461 "Exported NVM Subsystem %sSupported",
462 enss ? "" : "Not ");
463 stdout_bits_add(t, "[11:11]", hmlms,
464 "Host Managed Live Migration %sSupported",
465 hmlms ? "" : "Not ");
466 stdout_bits_add(t, "[10:10]", lock,
467 "Lockdown Command and Feature %sSupported",
468 lock ? "" : "Not ");
469 stdout_bits_add(t, "[9:9]", glbas,
470 "Get LBA Status Capability %sSupported",
471 glbas ? "" : "Not ");
472 stdout_bits_add(t, "[8:8]", dbc, "Doorbell Buffer Config %sSupported",
473 dbc ? "" : "Not ");
474 stdout_bits_add(t, "[7:7]", vir,
475 "Virtualization Management %sSupported",
476 vir ? "" : "Not ");
477 stdout_bits_add(t, "[6:6]", nmi, "NVMe-MI Send and Receive %sSupported",
478 nmi ? "" : "Not ");
479 stdout_bits_add(t, "[5:5]", dir, "Directives %sSupported",
480 dir ? "" : "Not ");
481 stdout_bits_add(t, "[4:4]", sft, "Device Self-test %sSupported",
482 sft ? "" : "Not ");
483 stdout_bits_add(t, "[3:3]", nsm,
484 "NS Management and Attachment %sSupported",
485 nsm ? "" : "Not ");
486 stdout_bits_add(t, "[2:2]", fwc, "FW Commit and Download %sSupported",
487 fwc ? "" : "Not ");
488 stdout_bits_add(t, "[1:1]", fmt, "Format NVM %sSupported",
489 fmt ? "" : "Not ");
490 stdout_bits_add(t, "[0:0]", sec,
491 "Security Send and Receive %sSupported",
492 sec ? "" : "Not ");
493
494 return t;
495}
496
497static struct shr_table *stdout_id_ctrl_frmw_table(__u8 frmw)
498{
499 struct shr_table *t;
500 __u8 rsvd = (frmw & 0xC0) >> 6;
501 __u8 smud = (frmw >> 5) & 0x1;
502 __u8 fawr = (frmw & 0x10) >> 4;
503 __u8 nfws = (frmw & 0xE) >> 1;
504 __u8 s1ro = frmw & 0x1;
505
506 t = stdout_bits_table_create();
507 if (!t)
508 return NULL((void*)0);
509
510 if (rsvd)
511 stdout_bits_add(t, "[7:6]", rsvd, "Reserved");
512 stdout_bits_add(t, "[5:5]", smud,
513 "Multiple FW or Boot Update Detection %sSupported",
514 smud ? "" : "Not ");
515 stdout_bits_add(t, "[4:4]", fawr,
516 "Firmware Activate Without Reset %sSupported",
517 fawr ? "" : "Not ");
518 stdout_bits_add(t, "[3:1]", nfws, "Number of Firmware Slots");
519 stdout_bits_add(t, "[0:0]", s1ro, "Firmware Slot 1 Read%s",
520 s1ro ? "-Only" : "/Write");
521
522 return t;
523}
524
525static struct shr_table *stdout_id_ctrl_lpa_table(__u8 lpa)
526{
527 struct shr_table *t;
528 __u8 rsvd = (lpa & 0x80) >> 7;
529 __u8 tel = (lpa >> 6) & 0x1;
530 __u8 lid_sup = (lpa >> 5) & 0x1;
531 __u8 persevnt = (lpa & 0x10) >> 4;
532 __u8 telem = (lpa & 0x8) >> 3;
533 __u8 ed = (lpa & 0x4) >> 2;
534 __u8 celp = (lpa & 0x2) >> 1;
535 __u8 smlp = lpa & 0x1;
536
537 t = stdout_bits_table_create();
538 if (!t)
539 return NULL((void*)0);
540
541 if (rsvd)
542 stdout_bits_add(t, "[7:7]", rsvd, "Reserved");
543 stdout_bits_add(t, "[6:6]", tel,
544 "Telemetry Log Data Area 4 %sSupported",
545 tel ? "" : "Not ");
546 stdout_bits_add(t, "[5:5]", lid_sup,
547 "LID 0x0, Scope of each command in LID 0x5, 0x12, 0x13 %sSupported",
548 lid_sup ? "" : "Not ");
549 stdout_bits_add(t, "[4:4]", persevnt,
550 "Persistent Event log %sSupported",
551 persevnt ? "" : "Not ");
552 stdout_bits_add(t, "[3:3]", telem,
553 "Telemetry host/controller initiated log page %sSupported",
554 telem ? "" : "Not ");
555 stdout_bits_add(t, "[2:2]", ed,
556 "Extended data for Get Log Page %sSupported",
557 ed ? "" : "Not ");
558 stdout_bits_add(t, "[1:1]", celp,
559 "Command Effects Log Page %sSupported",
560 celp ? "" : "Not ");
561 stdout_bits_add(t, "[0:0]", smlp,
562 "SMART/Health Log Page per NS %sSupported",
563 smlp ? "" : "Not ");
564
565 return t;
566}
567
568static struct shr_table *stdout_id_ctrl_elpe_table(__u8 elpe)
569{
570 struct shr_table *t;
571
572 t = stdout_bits_table_create();
573 if (!t)
574 return NULL((void*)0);
575
576 stdout_bits_add(t, "[7:0]", elpe,
577 "Error Log Page Entries (ELPE), 0's based");
578
579 return t;
580}
581
582static struct shr_table *stdout_id_ctrl_npss_table(__u8 npss)
583{
584 struct shr_table *t;
585
586 t = stdout_bits_table_create();
587 if (!t)
588 return NULL((void*)0);
589
590 stdout_bits_add(t, "[7:0]", npss,
591 "Number of Power States Support (NPSS), 0's based");
592
593 return t;
594}
595
596static struct shr_table *stdout_id_ctrl_avscc_table(__u8 avscc)
597{
598 struct shr_table *t;
599 __u8 rsvd = (avscc & 0xFE) >> 1;
600 __u8 fmt = avscc & 0x1;
601
602 t = stdout_bits_table_create();
603 if (!t)
604 return NULL((void*)0);
605
606 if (rsvd)
607 stdout_bits_add(t, "[7:1]", rsvd, "Reserved");
608 stdout_bits_add(t, "[0:0]", fmt,
609 "Admin Vendor Specific Commands uses %s Format",
610 fmt ? "NVMe" : "Vendor Specific");
611
612 return t;
613}
614
615static struct shr_table *stdout_id_ctrl_apsta_table(__u8 apsta)
616{
617 struct shr_table *t;
618 __u8 rsvd = (apsta & 0xFE) >> 1;
619 __u8 apst = apsta & 0x1;
620
621 t = stdout_bits_table_create();
622 if (!t)
623 return NULL((void*)0);
624
625 if (rsvd)
626 stdout_bits_add(t, "[7:1]", rsvd, "Reserved");
627 stdout_bits_add(t, "[0:0]", apst,
628 "Autonomous Power State Transitions %sSupported",
629 apst ? "" : "Not ");
630
631 return t;
632}
633
634static struct shr_table *stdout_id_ctrl_wctemp_table(__le16 wctemp)
635{
636 struct shr_table *t;
637 __u16 val = le16_to_cpu(wctemp);
638
639 t = stdout_bits_table_create();
640 if (!t)
641 return NULL((void*)0);
642
643 stdout_bits_add(t, "[15:0]", val,
644 "%s (%u K, %s) Warning Composite Temperature Threshold (WCTEMP)",
645 nvme_degrees_string(val), val,
646 nvme_degrees_fahrenheit_string(val));
647
648 return t;
649}
650
651static struct shr_table *stdout_id_ctrl_cctemp_table(__le16 cctemp)
652{
653 struct shr_table *t;
654 __u16 val = le16_to_cpu(cctemp);
655
656 t = stdout_bits_table_create();
657 if (!t)
658 return NULL((void*)0);
659
660 stdout_bits_add(t, "[15:0]", val,
661 "%s (%u K, %s) Critical Composite Temperature Threshold (CCTEMP)",
662 nvme_degrees_string(val), val,
663 nvme_degrees_fahrenheit_string(val));
664
665 return t;
666}
667
668static struct shr_table *stdout_id_ctrl_tnvmcap_table(__u8 *tnvmcap)
669{
670 struct shr_table *t;
671
672 t = stdout_bits_table_create();
673 if (!t)
674 return NULL((void*)0);
675
676 stdout_bits_add_str(t, "[127:0]",
677 uint128_t_to_l10n_string(le128_to_cpu(tnvmcap)),
678 "Total NVM Capacity (TNVMCAP)");
679
680 return t;
681}
682
683static struct shr_table *stdout_id_ctrl_unvmcap_table(__u8 *unvmcap)
684{
685 struct shr_table *t;
686
687 t = stdout_bits_table_create();
688 if (!t)
689 return NULL((void*)0);
690
691 stdout_bits_add_str(t, "[127:0]",
692 uint128_t_to_l10n_string(le128_to_cpu(unvmcap)),
693 "Unallocated NVM Capacity (UNVMCAP)");
694
695 return t;
696}
697
698static struct shr_table *stdout_id_ctrl_rpmbs_table(__le32 ctrl_rpmbs)
699{
700 struct shr_table *t;
701 __u32 rpmbs = le32_to_cpu(ctrl_rpmbs);
702 __u32 asz = (rpmbs & 0xFF000000) >> 24;
703 __u32 tsz = (rpmbs & 0xFF0000) >> 16;
704 __u32 rsvd = (rpmbs & 0xFFC0) >> 6;
705 __u32 auth = (rpmbs & 0x38) >> 3;
706 __u32 rpmb = rpmbs & 0x7;
707
708 t = stdout_bits_table_create();
709 if (!t)
710 return NULL((void*)0);
711
712 stdout_bits_add(t, "[31:24]", asz, "Access Size");
713 stdout_bits_add(t, "[23:16]", tsz, "Total Size");
714 if (rsvd)
715 stdout_bits_add(t, "[15:6]", rsvd, "Reserved");
716 stdout_bits_add(t, "[5:3]", auth, "Authentication Method");
717 stdout_bits_add(t, "[2:0]", rpmb, "Number of RPMB Units");
718
719 return t;
720}
721
722void stdout_id_ctrl_rpmbs(__le32 ctrl_rpmbs)
723{
724 stdout_kv_table_finish(stdout_id_ctrl_rpmbs_table(ctrl_rpmbs),
725 "id-ctrl-rpmbs");
726 printf("\n");
727}
728
729static struct shr_table *stdout_id_ctrl_dsto_table(__u8 dsto)
730{
731 struct shr_table *t;
732 __u8 rsvd2 = (dsto & 0xfc) >> 2;
733 __u8 hirs = NVME_CTRL_DSTO_HIRS(dsto)(((dsto) >> NVME_CTRL_DSTO_HIRS_SHIFT) & NVME_CTRL_DSTO_HIRS_MASK
)
;
734 __u8 sdso = NVME_CTRL_DSTO_SDSO(dsto)(((dsto) >> NVME_CTRL_DSTO_SDSO_SHIFT) & NVME_CTRL_DSTO_SDSO_MASK
)
;
735
736 t = stdout_bits_table_create();
737 if (!t)
738 return NULL((void*)0);
739
740 if (rsvd2)
741 stdout_bits_add(t, "[7:2]", rsvd2, "Reserved");
742 stdout_bits_add(t, "[1:1]", hirs,
743 "Host-Initiated Refresh capability %sSupported",
744 hirs ? "" : "Not ");
745 stdout_bits_add(t, "[0:0]", sdso, "NVM subsystem supports %s at a time",
746 sdso ?
747 "only one device self-test operation in progress" :
748 "one device self-test operation per controller");
749
750 return t;
751}
752
753static struct shr_table *stdout_id_ctrl_hctma_table(__le16 ctrl_hctma)
754{
755 struct shr_table *t;
756 __u16 hctma = le16_to_cpu(ctrl_hctma);
757 __u16 rsvd = (hctma & 0xFFFE) >> 1;
758 __u16 hctm = hctma & 0x1;
759
760 t = stdout_bits_table_create();
761 if (!t)
762 return NULL((void*)0);
763
764 if (rsvd)
765 stdout_bits_add(t, "[15:1]", rsvd, "Reserved");
766 stdout_bits_add(t, "[0:0]", hctm,
767 "Host Controlled Thermal Management %sSupported",
768 hctm ? "" : "Not ");
769
770 return t;
771}
772
773static struct shr_table *stdout_id_ctrl_mntmt_table(__le16 mntmt_le)
774{
775 struct shr_table *t;
776 __u16 mntmt = le16_to_cpu(mntmt_le);
777
778 t = stdout_bits_table_create();
779 if (!t)
780 return NULL((void*)0);
781
782 stdout_bits_add(t, "[15:0]", mntmt,
783 "%s (%u K, %s) Minimum Thermal Management Temperature (MNTMT)",
784 nvme_degrees_string(mntmt), mntmt,
785 nvme_degrees_fahrenheit_string(mntmt));
786
787 return t;
788}
789
790static struct shr_table *stdout_id_ctrl_mxtmt_table(__le16 mxtmt_le)
791{
792 struct shr_table *t;
793 __u16 mxtmt = le16_to_cpu(mxtmt_le);
794
795 t = stdout_bits_table_create();
796 if (!t)
797 return NULL((void*)0);
798
799 stdout_bits_add(t, "[15:0]", mxtmt,
800 "%s (%u K, %s) Maximum Thermal Management Temperature (MXTMT)",
801 nvme_degrees_string(mxtmt), mxtmt,
802 nvme_degrees_fahrenheit_string(mxtmt));
803
804 return t;
805}
806
807static struct shr_table *stdout_id_ctrl_sanicap_table(__le32 ctrl_sanicap)
808{
809 struct shr_table *t;
810 __u32 sanicap = le32_to_cpu(ctrl_sanicap);
811 __u32 rsvd6 = (sanicap & 0x1FFFFFC0) >> 6;
812 __u32 sprrs = NVME_CTRL_SANICAP_SPRRS(sanicap)(((sanicap) >> NVME_CTRL_SANICAP_SPRRS_SHIFT) & NVME_CTRL_SANICAP_SPRRS_MASK
)
;
813 __u32 vers = NVME_CTRL_SANICAP_NVERS(sanicap)(((sanicap) >> NVME_CTRL_SANICAP_NVERS_SHIFT) & NVME_CTRL_SANICAP_NVERS_MASK
)
;
814 __u32 ows = NVME_CTRL_SANICAP_OWS(sanicap)(((sanicap) >> NVME_CTRL_SANICAP_OWS_SHIFT) & NVME_CTRL_SANICAP_OWS_MASK
)
;
815 __u32 bes = NVME_CTRL_SANICAP_BES(sanicap)(((sanicap) >> NVME_CTRL_SANICAP_BES_SHIFT) & NVME_CTRL_SANICAP_BES_MASK
)
;
816 __u32 ces = NVME_CTRL_SANICAP_CES(sanicap)(((sanicap) >> NVME_CTRL_SANICAP_CES_SHIFT) & NVME_CTRL_SANICAP_CES_MASK
)
;
817 __u32 ndi = NVME_CTRL_SANICAP_NDI(sanicap)(((sanicap) >> NVME_CTRL_SANICAP_NDI_SHIFT) & NVME_CTRL_SANICAP_NDI_MASK
)
;
818 __u32 nodmmas = NVME_CTRL_SANICAP_NODMMAS(sanicap)(((sanicap) >> NVME_CTRL_SANICAP_NODMMAS_SHIFT) & NVME_CTRL_SANICAP_NODMMAS_MASK
)
;
819
820 static const char * const modifies_media[] = {
821 "Additional media modification after sanitize operation completes successfully is not defined",
822 "Media is not additionally modified after sanitize operation completes successfully",
823 "Media is additionally modified after sanitize operation completes successfully",
824 "Reserved"
825 };
826
827 t = stdout_bits_table_create();
828 if (!t)
829 return NULL((void*)0);
830
831 stdout_bits_add(t, "[31:30]", nodmmas, "%s", modifies_media[nodmmas]);
832 stdout_bits_add(t, "[29:29]", ndi,
833 "No-Deallocate After Sanitize bit in Sanitize command %sSupported",
834 ndi ? "Not " : "");
835 if (rsvd6)
836 stdout_bits_add(t, "[28:6]", rsvd6, "Reserved");
837 stdout_bits_add(t, "[5:5]", sprrs,
838 "Sanitize Purge Request and Reporting %sSupported",
839 sprrs ? "" : "Not ");
840 stdout_bits_add(t, "[3:3]", vers,
841 "Media Verification and Post-Verification Deallocation state %sSupported",
842 vers ? "" : "Not ");
843 stdout_bits_add(t, "[2:2]", ows,
844 "Overwrite Sanitize Operation %sSupported",
845 ows ? "" : "Not ");
846 stdout_bits_add(t, "[1:1]", bes,
847 "Block Erase Sanitize Operation %sSupported",
848 bes ? "" : "Not ");
849 stdout_bits_add(t, "[0:0]", ces,
850 "Crypto Erase Sanitize Operation %sSupported",
851 ces ? "" : "Not ");
852
853 return t;
854}
855
856static struct shr_table *stdout_id_ctrl_anacap_table(__u8 anacap)
857{
858 struct shr_table *t;
859 __u8 nz = (anacap & 0x80) >> 7;
860 __u8 grpid_static = (anacap & 0x40) >> 6;
861 __u8 rsvd = (anacap & 0x20) >> 5;
862 __u8 ana_change = (anacap & 0x10) >> 4;
863 __u8 ana_persist_loss = (anacap & 0x08) >> 3;
864 __u8 ana_inaccessible = (anacap & 0x04) >> 2;
865 __u8 ana_nonopt = (anacap & 0x02) >> 1;
866 __u8 ana_opt = (anacap & 0x01);
867
868 t = stdout_bits_table_create();
869 if (!t)
870 return NULL((void*)0);
871
872 stdout_bits_add(t, "[7:7]", nz, "Non-zero group ID %sSupported",
873 nz ? "" : "Not ");
874 stdout_bits_add(t, "[6:6]", grpid_static, "Group ID does %schange",
875 grpid_static ? "not " : "");
876 if (rsvd)
877 stdout_bits_add(t, "[5:5]", rsvd, "Reserved");
878 stdout_bits_add(t, "[4:4]", ana_change, "ANA Change state %sSupported",
879 ana_change ? "" : "Not ");
880 stdout_bits_add(t, "[3:3]", ana_persist_loss,
881 "ANA Persistent Loss state %sSupported",
882 ana_persist_loss ? "" : "Not ");
883 stdout_bits_add(t, "[2:2]", ana_inaccessible,
884 "ANA Inaccessible state %sSupported",
885 ana_inaccessible ? "" : "Not ");
886 stdout_bits_add(t, "[1:1]", ana_nonopt,
887 "ANA Non-optimized state %sSupported",
888 ana_nonopt ? "" : "Not ");
889 stdout_bits_add(t, "[0:0]", ana_opt, "ANA Optimized state %sSupported",
890 ana_opt ? "" : "Not ");
891
892 return t;
893}
894
895static struct shr_table *stdout_id_ctrl_kpioc_table(__u8 ctrl_kpioc)
896{
897 struct shr_table *t;
898 __u8 rsvd2 = (ctrl_kpioc >> 2);
899 __u8 kpiosc = NVME_CTRL_KPIOC_KPIOSC(ctrl_kpioc)(((ctrl_kpioc) >> NVME_CTRL_KPIOC_KPIOSC_SHIFT) & NVME_CTRL_KPIOC_KPIOSC_MASK
)
;
900 __u8 kpios = NVME_CTRL_KPIOC_KPIOS(ctrl_kpioc)(((ctrl_kpioc) >> NVME_CTRL_KPIOC_KPIOS_SHIFT) & NVME_CTRL_KPIOC_KPIOS_MASK
)
;
901
902 t = stdout_bits_table_create();
903 if (!t)
904 return NULL((void*)0);
905
906 if (rsvd2)
907 stdout_bits_add(t, "[7:2]", rsvd2, "Reserved");
908 stdout_bits_add(t, "[1:1]", kpiosc,
909 "Key Per I/O capability %s to all namespaces",
910 kpiosc ? "applies" : "Not apply");
911 stdout_bits_add(t, "[0:0]", kpios, "Key Per I/O capability %sSupported",
912 kpios ? "" : "Not ");
913
914 return t;
915}
916
917static struct shr_table *stdout_id_ctrl_tmpthha_table(__u8 tmpthha)
918{
919 struct shr_table *t;
920 __u8 rsvd3 = (tmpthha & 0xf8) >> 3;
921 __u8 tmpthmh = tmpthha & 0x7;
922
923 t = stdout_bits_table_create();
924 if (!t)
925 return NULL((void*)0);
926
927 if (rsvd3)
928 stdout_bits_add(t, "[7:3]", rsvd3, "Reserved");
929 stdout_bits_add(t, "[2:0]", tmpthmh,
930 "Temperature Threshold Maximum Hysteresis");
931
932 return t;
933}
934
935static struct shr_table *stdout_id_ctrl_mupa_table(__u8 mupa)
936{
937 struct shr_table *t;
938 __u8 mups = NVME_CTRL_MUPA_MUPS(mupa)(((mupa) >> NVME_CTRL_MUPA_MUPS_SHIFT) & NVME_CTRL_MUPA_MUPS_MASK
)
;
939
940 t = stdout_bits_table_create();
941 if (!t)
942 return NULL((void*)0);
943
944 stdout_bits_add(t, "[1:0]", mups, "Maximum Unlimited Power Scale (%s)",
945 nvme_feature_power_limit_scale_to_string(mups));
946
947 return t;
948}
949
950static struct shr_table *stdout_id_ctrl_cdpa_table(__le16 ctrl_cdpa)
951{
952 struct shr_table *t;
953 __u16 cdpa = le16_to_cpu(ctrl_cdpa);
954 __u16 rsvd1 = (cdpa >> 1);
955 bool_Bool hmac_sha_384 = !!(cdpa & NVME_CTRL_CDPA_HMAC_SHA_384);
956
957 t = stdout_bits_table_create();
958 if (!t)
959 return NULL((void*)0);
960
961 if (rsvd1)
962 stdout_bits_add(t, "[15:1]", rsvd1, "Reserved");
963 stdout_bits_add(t, "[0:0]", hmac_sha_384, "HMAC-SHA-384 %sSupported",
964 hmac_sha_384 ? "" : "Not ");
965
966 return t;
967}
968
969static struct shr_table *stdout_id_ctrl_ipmsr_table(__le16 ctrl_ipmsr)
970{
971 struct shr_table *t;
972 __u16 ipmsr = le16_to_cpu(ctrl_ipmsr);
973 __u16 srs = NVME_CTRL_IPMSR_SRS(ipmsr)(((ipmsr) >> NVME_CTRL_IPMSR_SRS_SHIFT) & NVME_CTRL_IPMSR_SRS_MASK
)
;
974 __u16 srv = NVME_CTRL_IPMSR_SRV(ipmsr)(((ipmsr) >> NVME_CTRL_IPMSR_SRV_SHIFT) & NVME_CTRL_IPMSR_SRV_MASK
)
;
975
976 t = stdout_bits_table_create();
977 if (!t)
978 return NULL((void*)0);
979
980 stdout_bits_add(t, "[15:8]", srs, "Sample Rate Scale (%s)",
981 nvme_ipmsr_srs_to_string(srs));
982 stdout_bits_add(t, "[7:0]", srv, "Sample Rate Value");
983
984 return t;
985}
986
987static struct shr_table *stdout_id_ctrl_ensa_table(__u8 ensa)
988{
989 struct shr_table *t;
990 bool_Bool ensms = !!NVME_CTRL_ENSA_ENSMS(ensa)(((ensa) >> NVME_CTRL_ENSA_ENSMS_SHIFT) & NVME_CTRL_ENSA_ENSMS_MASK
)
;
991 bool_Bool ensts = !!NVME_CTRL_ENSA_ENSTS(ensa)(((ensa) >> NVME_CTRL_ENSA_ENSTS_SHIFT) & NVME_CTRL_ENSA_ENSTS_MASK
)
;
992
993 t = stdout_bits_table_create();
994 if (!t)
995 return NULL((void*)0);
996
997 stdout_bits_add(t, "[1:1]", ensms,
998 "Exported NVM Subsystem Support Migration %s",
999 nvme_support_str(ensms));
1000 stdout_bits_add(t, "[0:0]", ensts,
1001 "Exported NVM Subsystem Template %s",
1002 nvme_support_str(ensts));
1003
1004 return t;
1005}
1006
1007static struct shr_table *stdout_id_ctrl_endsfs_table(__u8 endsfs)
1008{
1009 struct shr_table *t;
1010 bool_Bool enf1 = !!NVME_CTRL_ENDSFS_ENF1(endsfs)(((endsfs) >> NVME_CTRL_ENDSFS_ENF1_SHIFT) & NVME_CTRL_ENDSFS_ENF1_MASK
)
;
1011 bool_Bool enf0 = !!NVME_CTRL_ENDSFS_ENF0(endsfs)(((endsfs) >> NVME_CTRL_ENDSFS_ENF0_SHIFT) & NVME_CTRL_ENDSFS_ENF0_MASK
)
;
1012
1013 t = stdout_bits_table_create();
1014 if (!t)
1015 return NULL((void*)0);
1016
1017 stdout_bits_add(t, "[1:1]", enf1, "Exported Namespace Format 1 %s",
1018 nvme_support_str(enf1));
1019 stdout_bits_add(t, "[0:0]", enf0, "Exported Namespace Format 0 %s",
1020 nvme_support_str(enf0));
1021
1022 return t;
1023}
1024
1025static struct shr_table *stdout_id_ctrl_vsen_table(__le32 ctrl_vsen)
1026{
1027 struct shr_table *t;
1028 __u32 vsen = le32_to_cpu(ctrl_vsen);
1029
1030 t = stdout_bits_table_create();
1031 if (!t)
1032 return NULL((void*)0);
1033
1034 if (!vsen) {
1035 int row = shr_table_get_row_id(t);
1036
1037 shr_table_set_value_str(t, 0, row, "", RIGHT);
1038 shr_table_set_value_str(t, 1, row, "", LEFT);
1039 shr_table_set_value_str(t, 2, row, "", RIGHT);
1040 shr_table_set_value_str(t, 3, row,
1041 "Voltage sensor not supported", LEFT);
1042 shr_table_add_row(t, row);
1043
1044 return t;
1045 }
1046
1047 stdout_bits_add(t, "[31:24]", NVME_CTRL_VSEN_VSRS(vsen)(((vsen) >> NVME_CTRL_VSEN_VSRS_SHIFT) & NVME_CTRL_VSEN_VSRS_MASK
)
,
1048 "Voltage Sample Rate Scale");
1049 stdout_bits_add(t, "[23:16]", NVME_CTRL_VSEN_VSRV(vsen)(((vsen) >> NVME_CTRL_VSEN_VSRV_SHIFT) & NVME_CTRL_VSEN_VSRV_MASK
)
,
1050 "Voltage Sample Rate Value");
1051 stdout_bits_add(t, "[15:14]", NVME_CTRL_VSEN_VOLSS(vsen)(((vsen) >> NVME_CTRL_VSEN_VOLSS_SHIFT) & NVME_CTRL_VSEN_VOLSS_MASK
)
,
1052 "Voltage Sample Scale");
1053 stdout_bits_add(t, "[13:12]", NVME_CTRL_VSEN_PISL(vsen)(((vsen) >> NVME_CTRL_VSEN_PISL_SHIFT) & NVME_CTRL_VSEN_PISL_MASK
)
,
1054 "Power Input Supply Label");
1055 stdout_bits_add(t, "[11:0]", NVME_CTRL_VSEN_PISV(vsen)(((vsen) >> NVME_CTRL_VSEN_PISV_SHIFT) & NVME_CTRL_VSEN_PISV_MASK
)
,
1056 "Power Input Supply Value (%g V)",
1057 NVME_CTRL_VSEN_PISV(vsen)(((vsen) >> NVME_CTRL_VSEN_PISV_SHIFT) & NVME_CTRL_VSEN_PISV_MASK
)
* 0.05);
1058
1059 return t;
1060}
1061
1062static struct shr_table *stdout_id_ctrl_sqes_table(__u8 sqes)
1063{
1064 struct shr_table *t;
1065 __u8 msqes = (sqes & 0xF0) >> 4;
1066 __u8 rsqes = sqes & 0xF;
1067
1068 t = stdout_bits_table_create();
1069 if (!t)
1070 return NULL((void*)0);
1071
1072 stdout_bits_add(t, "[7:4]", msqes,
1073 "Max SQ Entry Size (%d)", 1 << msqes);
1074 stdout_bits_add(t, "[3:0]", rsqes,
1075 "Min SQ Entry Size (%d)", 1 << rsqes);
1076
1077 return t;
1078}
1079
1080static struct shr_table *stdout_id_ctrl_cqes_table(__u8 cqes)
1081{
1082 struct shr_table *t;
1083 __u8 mcqes = (cqes & 0xF0) >> 4;
1084 __u8 rcqes = cqes & 0xF;
1085
1086 t = stdout_bits_table_create();
1087 if (!t)
1088 return NULL((void*)0);
1089
1090 stdout_bits_add(t, "[7:4]", mcqes,
1091 "Max CQ Entry Size (%d)", 1 << mcqes);
1092 stdout_bits_add(t, "[3:0]", rcqes,
1093 "Min CQ Entry Size (%d)", 1 << rcqes);
1094
1095 return t;
1096}
1097
1098static struct shr_table *stdout_id_ctrl_oncs_table(__le16 ctrl_oncs)
1099{
1100 struct shr_table *t;
1101 __u16 oncs = le16_to_cpu(ctrl_oncs);
1102 __u16 rsvd13 = oncs >> 13;
1103 bool_Bool nszs = !!(oncs & NVME_CTRL_ONCS_NAMESPACE_ZEROES);
1104 bool_Bool maxwzd = !!(oncs & NVME_CTRL_ONCS_WRITE_ZEROES_DEALLOCATE);
1105 bool_Bool nvmafc = !!(oncs & NVME_CTRL_ONCS_ALL_FAST_COPY);
1106 bool_Bool nvmcsa = !!(oncs & NVME_CTRL_ONCS_COPY_SINGLE_ATOMICITY);
1107 bool_Bool nvmcpys = !!(oncs & NVME_CTRL_ONCS_COPY);
1108 bool_Bool nvmvfys = !!(oncs & NVME_CTRL_ONCS_VERIFY);
1109 bool_Bool tss = !!(oncs & NVME_CTRL_ONCS_TIMESTAMP);
1110 bool_Bool reservs = !!(oncs & NVME_CTRL_ONCS_RESERVATIONS);
1111 bool_Bool ssfs = !!(oncs & NVME_CTRL_ONCS_SAVE_FEATURES);
1112 bool_Bool nvmwzsv = !!(oncs & NVME_CTRL_ONCS_WRITE_ZEROES);
1113 bool_Bool nvmdsmsv = !!(oncs & NVME_CTRL_ONCS_DSM);
1114 bool_Bool nvmwusv = !!(oncs & NVME_CTRL_ONCS_WRITE_UNCORRECTABLE);
1115 bool_Bool nvmcmps = !!(oncs & NVME_CTRL_ONCS_COMPARE);
1116
1117 t = stdout_bits_table_create();
1118 if (!t)
1119 return NULL((void*)0);
1120
1121 if (rsvd13)
1122 stdout_bits_add(t, "[15:13]", rsvd13, "Reserved");
1123 stdout_bits_add(t, "[12:12]", nszs, "Namespace Zeroes %sSupported",
1124 nszs ? "" : "Not ");
1125 stdout_bits_add(t, "[11:11]", maxwzd,
1126 "Maximum Write Zeroes with Deallocate %sSupported",
1127 maxwzd ? "" : "Not ");
1128 stdout_bits_add(t, "[10:10]", nvmafc, "All Fast Copy %sSupported",
1129 nvmafc ? "" : "Not ");
1130 stdout_bits_add(t, "[9:9]", nvmcsa, "Copy Single Atomicity %sSupported",
1131 nvmcsa ? "" : "Not ");
1132 stdout_bits_add(t, "[8:8]", nvmcpys, "Copy %sSupported",
1133 nvmcpys ? "" : "Not ");
1134 stdout_bits_add(t, "[7:7]", nvmvfys, "Verify %sSupported",
1135 nvmvfys ? "" : "Not ");
1136 stdout_bits_add(t, "[6:6]", tss, "Timestamp %sSupported",
1137 tss ? "" : "Not ");
1138 stdout_bits_add(t, "[5:5]", reservs, "Reservations %sSupported",
1139 reservs ? "" : "Not ");
1140 stdout_bits_add(t, "[4:4]", ssfs, "Save and Select %sSupported",
1141 ssfs ? "" : "Not ");
1142 stdout_bits_add(t, "[3:3]", nvmwzsv, "Write Zeroes Support Variants");
1143 stdout_bits_add(t, "[2:2]", nvmdsmsv,
1144 "Dataset Management Support Variants");
1145 stdout_bits_add(t, "[1:1]", nvmwusv,
1146 "Write Uncorrectable Support Variants");
1147 stdout_bits_add(t, "[0:0]", nvmcmps, "Compare Command %sSupported",
1148 nvmcmps ? "" : "Not ");
1149
1150 return t;
1151}
1152
1153static struct shr_table *stdout_id_ctrl_fuses_table(__le16 ctrl_fuses)
1154{
1155 struct shr_table *t;
1156 __u16 fuses = le16_to_cpu(ctrl_fuses);
1157 __u16 rsvd = (fuses & 0xFE) >> 1;
1158 __u16 cmpw = fuses & 0x1;
1159
1160 t = stdout_bits_table_create();
1161 if (!t)
1162 return NULL((void*)0);
1163
1164 if (rsvd)
1165 stdout_bits_add(t, "[15:1]", rsvd, "Reserved");
1166 stdout_bits_add(t, "[0:0]", cmpw, "Fused Compare and Write %sSupported",
1167 cmpw ? "" : "Not ");
1168
1169 return t;
1170}
1171
1172static struct shr_table *stdout_id_ctrl_fna_table(__u8 fna)
1173{
1174 struct shr_table *t;
1175 __u8 rsvd = (fna & 0xF0) >> 4;
1176 __u8 bcnsid = NVME_CTRL_FNA_NSID_ALL_F(fna)(((fna) >> NVME_CTRL_FNA_NSID_ALL_F_SHIFT) & NVME_CTRL_FNA_NSID_ALL_F_MASK
)
;
1177 __u8 cese = NVME_CTRL_FNA_CES(fna)(((fna) >> NVME_CTRL_FNA_CES_SHIFT) & NVME_CTRL_FNA_CES_MASK
)
;
1178 __u8 cens = NVME_CTRL_FNA_SEC_ALL_NS(fna)(((fna) >> NVME_CTRL_FNA_SEC_ALL_NS_SHIFT) & NVME_CTRL_FNA_SEC_ALL_NS_MASK
)
;
1179 __u8 fmns = NVME_CTRL_FNA_FMT_ALL_NS(fna)(((fna) >> NVME_CTRL_FNA_FMT_ALL_NS_SHIFT) & NVME_CTRL_FNA_FMT_ALL_NS_MASK
)
;
1180
1181 t = stdout_bits_table_create();
1182 if (!t)
1183 return NULL((void*)0);
1184
1185 if (rsvd)
1186 stdout_bits_add(t, "[7:4]", rsvd, "Reserved");
1187 stdout_bits_add(t, "[3:3]", bcnsid,
1188 "Format NVM Broadcast NSID (FFFFFFFFh) %sSupported",
1189 bcnsid ? "Not " : "");
1190 stdout_bits_add(t, "[2:2]", cese,
1191 "Crypto Erase %sSupported as part of Secure Erase",
1192 cese ? "" : "Not ");
1193 stdout_bits_add(t, "[1:1]", cens,
1194 "Crypto Erase Applies to %s Namespace(s)",
1195 cens ? "All" : "Single");
1196 stdout_bits_add(t, "[0:0]", fmns, "Format Applies to %s Namespace(s)",
1197 fmns ? "All" : "Single");
1198
1199 return t;
1200}
1201
1202static struct shr_table *stdout_id_ctrl_vwc_table(__u8 vwc)
1203{
1204 struct shr_table *t;
1205 __u8 rsvd = (vwc & 0xF8) >> 3;
1206 __u8 flush = (vwc & 0x6) >> 1;
1207 __u8 vwcp = vwc & 0x1;
1208
1209 static const char * const flush_behavior[] = {
1210 "Support for the NSID field set to FFFFFFFFh is not indicated",
1211 "Reserved",
1212 "The Flush command does not support NSID set to FFFFFFFFh",
1213 "The Flush command supports NSID set to FFFFFFFFh"
1214 };
1215
1216 t = stdout_bits_table_create();
1217 if (!t)
1218 return NULL((void*)0);
1219
1220 if (rsvd)
1221 stdout_bits_add(t, "[7:3]", rsvd, "Reserved");
1222 stdout_bits_add(t, "[2:1]", flush, "%s", flush_behavior[flush]);
1223 stdout_bits_add(t, "[0:0]", vwcp, "Volatile Write Cache %sPresent",
1224 vwcp ? "" : "Not ");
1225
1226 return t;
1227}
1228
1229static struct shr_table *stdout_id_ctrl_icsvscc_table(__u8 icsvscc)
1230{
1231 struct shr_table *t;
1232 __u8 rsvd = (icsvscc & 0xFE) >> 1;
1233 __u8 fmt = icsvscc & 0x1;
1234
1235 t = stdout_bits_table_create();
1236 if (!t)
1237 return NULL((void*)0);
1238
1239 if (rsvd)
1240 stdout_bits_add(t, "[7:1]", rsvd, "Reserved");
1241 stdout_bits_add(t, "[0:0]", fmt,
1242 "NVM Vendor Specific Commands uses %s Format",
1243 fmt ? "NVMe" : "Vendor Specific");
1244
1245 return t;
1246}
1247
1248static struct shr_table *stdout_id_ctrl_nwpc_table(__u8 nwpc)
1249{
1250 struct shr_table *t;
1251 __u8 no_wp_wp = (nwpc & 0x01);
1252 __u8 wp_power_cycle = (nwpc & 0x02) >> 1;
1253 __u8 wp_permanent = (nwpc & 0x04) >> 2;
1254 __u8 rsvd = (nwpc & 0xF8) >> 3;
1255
1256 t = stdout_bits_table_create();
1257 if (!t)
1258 return NULL((void*)0);
1259
1260 if (rsvd)
1261 stdout_bits_add(t, "[7:3]", rsvd, "Reserved");
1262 stdout_bits_add(t, "[2:2]", wp_permanent,
1263 "Permanent Write Protect %sSupported",
1264 wp_permanent ? "" : "Not ");
1265 stdout_bits_add(t, "[1:1]", wp_power_cycle,
1266 "Write Protect Until Power Supply %sSupported",
1267 wp_power_cycle ? "" : "Not ");
1268 stdout_bits_add(t, "[0:0]", no_wp_wp,
1269 "No Write Protect and Write Protect Namespace %sSupported",
1270 no_wp_wp ? "" : "Not ");
1271
1272 return t;
1273}
1274
1275static struct shr_table *stdout_id_ctrl_ocfs_table(__le16 ctrl_ocfs)
1276{
1277 struct shr_table *t;
1278 __u16 ocfs = le16_to_cpu(ctrl_ocfs);
1279 __u16 rsvd = ocfs >> 4;
1280 int copy_fmt;
1281
1282 t = stdout_bits_table_create();
1283 if (!t)
1284 return NULL((void*)0);
1285
1286 if (rsvd)
1287 stdout_bits_add(t, "[15:4]", rsvd, "Reserved");
1288
1289 for (copy_fmt = 3; copy_fmt >= 0; copy_fmt--) {
1290 __cleanup_free__attribute__((cleanup(shr_freep))) char *bits = NULL((void*)0);
1291 __cleanup_free__attribute__((cleanup(shr_freep))) char *desc = NULL((void*)0);
1292 __u8 supported = ocfs >> copy_fmt & 1;
1293
1294 if (asprintf(&bits, "[%d:%d]", copy_fmt, copy_fmt) < 0)
1295 bits = NULL((void*)0);
1296 if (asprintf(&desc, "Controller Copy Format %xh %sSupported",
1297 copy_fmt, supported ? "" : "Not ") < 0)
1298 desc = NULL((void*)0);
1299
1300 stdout_bits_add(t, bits ?: "", supported, desc ?: "");
1301 }
1302
1303 return t;
1304}
1305
1306static struct shr_table *stdout_id_ctrl_sgls_table(__le32 ctrl_sgls)
1307{
1308 struct shr_table *t;
1309 __u32 sgls = le32_to_cpu(ctrl_sgls);
1310 __u32 rsvd0 = (sgls & 0xFFC00000) >> 22;
1311 __u32 trsdbd = (sgls & 0x200000) >> 21;
1312 __u32 aofdsl = (sgls & 0x100000) >> 20;
1313 __u32 mpcsd = (sgls & 0x80000) >> 19;
1314 __u32 sglltb = (sgls & 0x40000) >> 18;
1315 __u32 bacmdb = (sgls & 0x20000) >> 17;
1316 __u32 bbs = (sgls & 0x10000) >> 16;
1317 __u32 sdt = (sgls >> 8) & 0xff;
1318 __u32 rsvd1 = (sgls & 0xF8) >> 3;
1319 __u32 key = (sgls & 0x4) >> 2;
1320 __u32 sglsp = sgls & 0x3;
1321
1322 t = stdout_bits_table_create();
1323 if (!t)
1324 return NULL((void*)0);
1325
1326 if (rsvd0)
1327 stdout_bits_add(t, "[31:22]", rsvd0, "Reserved");
1328 if (sglsp || (!sglsp && trsdbd))
1329 stdout_bits_add(t, "[21:21]", trsdbd,
1330 "Transport SGL Data Block Descriptor %sSupported",
1331 trsdbd ? "" : "Not ");
1332 if (sglsp || (!sglsp && aofdsl))
1333 stdout_bits_add(t, "[20:20]", aofdsl,
1334 "Address Offsets %sSupported",
1335 aofdsl ? "" : "Not ");
1336 if (sglsp || (!sglsp && mpcsd))
1337 stdout_bits_add(t, "[19:19]", mpcsd,
1338 "Metadata Pointer Containing SGL Descriptor is %sSupported",
1339 mpcsd ? "" : "Not ");
1340 if (sglsp || (!sglsp && sglltb))
1341 stdout_bits_add(t, "[18:18]", sglltb,
1342 "SGL Length Larger than Buffer %sSupported",
1343 sglltb ? "" : "Not ");
1344 if (sglsp || (!sglsp && bacmdb))
1345 stdout_bits_add(t, "[17:17]", bacmdb,
1346 "Byte-Aligned Contig. MD Buffer %sSupported",
1347 bacmdb ? "" : "Not ");
1348 if (sglsp || (!sglsp && bbs))
1349 stdout_bits_add(t, "[16:16]", bbs, "SGL Bit-Bucket %sSupported",
1350 bbs ? "" : "Not ");
1351 stdout_bits_add(t, "[15:8]", sdt, "SGL Descriptor Threshold");
1352 if (rsvd1)
1353 stdout_bits_add(t, "[7:3]", rsvd1, "Reserved");
1354 if (sglsp || (!sglsp && key))
1355 stdout_bits_add(t, "[2:2]", key,
1356 "Keyed SGL Data Block descriptor %sSupported",
1357 key ? "" : "Not ");
1358 if (sglsp == 0x3)
1359 stdout_bits_add(t, "[1:0]", sglsp, "Reserved");
1360 else if (sglsp == 0x2)
1361 stdout_bits_add(t, "[1:0]", sglsp,
1362 "Scatter-Gather Lists Supported. Dword alignment required.");
1363 else if (sglsp == 0x1)
1364 stdout_bits_add(t, "[1:0]", sglsp,
1365 "Scatter-Gather Lists Supported. No Dword alignment required.");
1366 else
1367 stdout_bits_add(t, "[1:0]", sglsp,
1368 "Scatter-Gather Lists Not Supported");
1369
1370 return t;
1371}
1372
1373static struct shr_table *stdout_id_ctrl_trattr_table(__u8 ctrl_trattr)
1374{
1375 struct shr_table *t;
1376 __u8 rsvd3 = (ctrl_trattr >> 3);
1377 __u8 mrtll = NVME_CTRL_TRATTR_MRTLL(ctrl_trattr)(((ctrl_trattr) >> NVME_CTRL_TRATTR_MRTLL_SHIFT) & NVME_CTRL_TRATTR_MRTLL_MASK
)
;
1378 __u8 tudcs = NVME_CTRL_TRATTR_TUDCS(ctrl_trattr)(((ctrl_trattr) >> NVME_CTRL_TRATTR_TUDCS_SHIFT) & NVME_CTRL_TRATTR_TUDCS_MASK
)
;
1379 __u8 thmcs = NVME_CTRL_TRATTR_THMCS(ctrl_trattr)(((ctrl_trattr) >> NVME_CTRL_TRATTR_THMCS_SHIFT) & NVME_CTRL_TRATTR_THMCS_MASK
)
;
1380
1381 t = stdout_bits_table_create();
1382 if (!t)
1383 return NULL((void*)0);
1384
1385 if (rsvd3)
1386 stdout_bits_add(t, "[7:3]", rsvd3, "Reserved");
1387 stdout_bits_add(t, "[2:2]", mrtll,
1388 "Memory Range Tracking Length Limit");
1389 stdout_bits_add(t, "[1:1]", tudcs,
1390 "Tracking User Data Changes %sSupported",
1391 tudcs ? "" : "Not ");
1392 stdout_bits_add(t, "[0:0]", thmcs,
1393 "Track Host Memory Changes %sSupported",
1394 thmcs ? "" : "Not ");
1395
1396 return t;
1397}
1398
1399static struct shr_table *stdout_id_ctrl_fcatt_table(__u8 fcatt)
1400{
1401 struct shr_table *t;
1402 __u8 rsvd = (fcatt & 0xFE) >> 1;
1403 __u8 scm = fcatt & 0x1;
1404
1405 t = stdout_bits_table_create();
1406 if (!t)
1407 return NULL((void*)0);
1408
1409 if (rsvd)
1410 stdout_bits_add(t, "[7:1]", rsvd, "Reserved");
1411 stdout_bits_add(t, "[0:0]", scm, "%s Controller Model",
1412 scm ? "Static" : "Dynamic");
1413
1414 return t;
1415}
1416
1417static struct shr_table *stdout_id_ctrl_ofcs_table(__le16 ofcs_le)
1418{
1419 struct shr_table *t;
1420 __u16 ofcs = le16_to_cpu(ofcs_le);
1421 __u16 rsvd = (ofcs & 0xfffe) >> 1;
1422 __u8 disconn = ofcs & 0x1;
1423
1424 t = stdout_bits_table_create();
1425 if (!t)
1426 return NULL((void*)0);
1427
1428 if (rsvd)
1429 stdout_bits_add(t, "[15:1]", rsvd, "Reserved");
1430 stdout_bits_add(t, "[0:0]", disconn, "Disconnect command %s Supported",
1431 disconn ? "" : "Not");
1432
1433 return t;
1434}
1435
1436static struct shr_table *stdout_id_ctrl_dctype_table(__u8 dctype)
1437{
1438 struct shr_table *t;
1439 __u8 rsvd = (dctype & 0xFC) >> 2;
1440 __u8 dctype_val = dctype & 0x3;
1441 char *dctype_str;
1442
1443 t = stdout_bits_table_create();
1444 if (!t)
1445 return NULL((void*)0);
1446
1447 if (rsvd)
1448 stdout_bits_add(t, "[7:3]", rsvd, "Reserved");
1449 if (dctype_val == NVME_CTRL_DCTYPE_CDC)
1450 dctype_str = "CDC";
1451 else if (dctype_val == NVME_CTRL_DCTYPE_DDC)
1452 dctype_str = "DDC";
1453 else
1454 dctype_str = "not reported";
1455
1456 stdout_bits_add(t, "[0:2]", dctype_val, "Discovery Controller Type: %s",
1457 dctype_str);
1458
1459 return t;
1460}
1461
1462static struct shr_table *stdout_id_ns_nsfeat_table(__u8 nsfeat)
1463{
1464 struct shr_table *t;
1465 __u8 optrperf = (nsfeat & 0x80) >> 7;
1466 __u8 mam = (nsfeat & 0x40) >> 6;
1467 __u8 optperf = (nsfeat & 0x30) >> 4;
1468 __u8 uidreuse = (nsfeat & 0x8) >> 3;
1469 __u8 dulbe = (nsfeat & 0x4) >> 2;
1470 __u8 na = (nsfeat & 0x2) >> 1;
1471 __u8 thin = nsfeat & 0x1;
1472
1473 t = stdout_bits_table_create();
1474 if (!t)
1475 return NULL((void*)0);
1476
1477 stdout_bits_add(t, "[7:7]", optrperf,
1478 "NPRG, NPRA and NORS are %sSupported",
1479 optrperf ? "" : "Not ");
1480 stdout_bits_add(t, "[6:6]", mam,
1481 "%s Atomicity Mode applies to write operations",
1482 mam ? "Multiple" : "Single");
1483 stdout_bits_add(t, "[5:4]", optperf,
1484 "NPWG, NPWA, %s%sNPDA, and NOWS are %sSupported",
1485 ((optperf & 0x1) || (!optperf)) ? "NPDG, " : "",
1486 ((optperf & 0x2) || (!optperf)) ? "NPDGL, " : "",
1487 optperf ? "" : "Not ");
1488 stdout_bits_add(t, "[3:3]", uidreuse,
1489 "NGUID and EUI64 fields if non-zero, %sReused",
1490 uidreuse ? "Never " : "");
1491 stdout_bits_add(t, "[2:2]", dulbe,
1492 "Deallocated or Unwritten Logical Block error %sSupported",
1493 dulbe ? "" : "Not ");
1494 stdout_bits_add(t, "[1:1]", na, "Namespace uses %s",
1495 na ? "NAWUN, NAWUPF, and NACWU" :
1496 "AWUN, AWUPF, and ACWU");
1497 stdout_bits_add(t, "[0:0]", thin, "Thin Provisioning %sSupported",
1498 thin ? "" : "Not ");
1499
1500 return t;
1501}
1502
1503static struct shr_table *stdout_id_ns_flbas_table(__u8 flbas)
1504{
1505 struct shr_table *t;
1506 __u8 rsvd = (flbas & 0x80) >> 7;
1507 __u8 msb2_lbaf = NVME_FLBAS_HIGHER(flbas)(((flbas) >> NVME_FLBAS_HIGHER_SHIFT) & NVME_FLBAS_HIGHER_MASK
)
;
1508 __u8 mdedata = NVME_FLBAS_META_EXT(flbas)(((flbas) >> NVME_FLBAS_META_EXT_SHIFT) & NVME_FLBAS_META_EXT_MASK
)
;
1509 __u8 lsb4_lbaf = NVME_FLBAS_LOWER(flbas)(((flbas) >> NVME_FLBAS_LOWER_SHIFT) & NVME_FLBAS_LOWER_MASK
)
;
1510
1511 t = stdout_bits_table_create();
1512 if (!t)
1513 return NULL((void*)0);
1514
1515 if (rsvd)
1516 stdout_bits_add(t, "[7:7]", rsvd, "Reserved");
1517 stdout_bits_add(t, "[6:5]", msb2_lbaf,
1518 "Most significant 2 bits of Current LBA Format Selected");
1519 stdout_bits_add(t, "[4:4]", mdedata, "Metadata Transferred %s",
1520 mdedata ? "at End of Data LBA" :
1521 "in Separate Contiguous Buffer");
1522 stdout_bits_add(t, "[3:0]", lsb4_lbaf,
1523 "Least significant 4 bits of Current LBA Format Selected");
1524
1525 return t;
1526}
1527
1528static struct shr_table *stdout_id_ns_mc_table(__u8 mc)
1529{
1530 struct shr_table *t;
1531 __u8 rsvd = (mc & 0xFC) >> 2;
1532 __u8 mdp = (mc & 0x2) >> 1;
1533 __u8 extdlba = mc & 0x1;
1534
1535 t = stdout_bits_table_create();
1536 if (!t)
1537 return NULL((void*)0);
1538
1539 if (rsvd)
1540 stdout_bits_add(t, "[7:2]", rsvd, "Reserved");
1541 stdout_bits_add(t, "[1:1]", mdp, "Metadata Pointer %sSupported",
1542 mdp ? "" : "Not ");
1543 stdout_bits_add(t, "[0:0]", extdlba,
1544 "Metadata as Part of Extended Data LBA %sSupported",
1545 extdlba ? "" : "Not ");
1546
1547 return t;
1548}
1549
1550static struct shr_table *stdout_id_ns_dpc_table(__u8 dpc)
1551{
1552 struct shr_table *t;
1553 __u8 rsvd = (dpc & 0xE0) >> 5;
1554 __u8 pil8 = (dpc & 0x10) >> 4;
1555 __u8 pif8 = (dpc & 0x8) >> 3;
1556 __u8 pit3 = (dpc & 0x4) >> 2;
1557 __u8 pit2 = (dpc & 0x2) >> 1;
1558 __u8 pit1 = dpc & 0x1;
1559
1560 t = stdout_bits_table_create();
1561 if (!t)
1562 return NULL((void*)0);
1563
1564 if (rsvd)
1565 stdout_bits_add(t, "[7:5]", rsvd, "Reserved");
1566 stdout_bits_add(t, "[4:4]", pil8,
1567 "Protection Information Transferred as Last Bytes of Metadata %sSupported",
1568 pil8 ? "" : "Not ");
1569 stdout_bits_add(t, "[3:3]", pif8,
1570 "Protection Information Transferred as First Bytes of Metadata %sSupported",
1571 pif8 ? "" : "Not ");
1572 stdout_bits_add(t, "[2:2]", pit3,
1573 "Protection Information Type 3 %sSupported",
1574 pit3 ? "" : "Not ");
1575 stdout_bits_add(t, "[1:1]", pit2,
1576 "Protection Information Type 2 %sSupported",
1577 pit2 ? "" : "Not ");
1578 stdout_bits_add(t, "[0:0]", pit1,
1579 "Protection Information Type 1 %sSupported",
1580 pit1 ? "" : "Not ");
1581
1582 return t;
1583}
1584
1585static struct shr_table *stdout_id_ns_dps_table(__u8 dps)
1586{
1587 struct shr_table *t;
1588 __u8 rsvd = (dps & 0xF0) >> 4;
1589 __u8 pif8 = NVME_NS_DPS_PI_FIRST(dps)(((dps) >> NVME_NS_DPS_PI_FIRST_SHIFT) & NVME_NS_DPS_PI_FIRST_MASK
)
;
1590 __u8 pit = NVME_NS_DPS_PI(dps)(((dps) >> NVME_NS_DPS_PI_SHIFT) & NVME_NS_DPS_PI_MASK
)
;
1591
1592 t = stdout_bits_table_create();
1593 if (!t)
1594 return NULL((void*)0);
1595
1596 if (rsvd)
1597 stdout_bits_add(t, "[7:4]", rsvd, "Reserved");
1598 stdout_bits_add(t, "[3:3]", pif8,
1599 "Protection Information is Transferred as %s Bytes of Metadata",
1600 pif8 ? "First" : "Last");
1601 stdout_bits_add(t, "[2:0]", pit, "Protection Information %s",
1602 pit == 3 ? "Type 3 Enabled" :
1603 pit == 2 ? "Type 2 Enabled" :
1604 pit == 1 ? "Type 1 Enabled" :
1605 pit == 0 ? "Disabled" : "Reserved Enabled");
1606
1607 return t;
1608}
1609
1610static struct shr_table *stdout_id_ns_nmic_table(__u8 nmic)
1611{
1612 struct shr_table *t;
1613 __u8 rsvd = (nmic & 0xfc) >> 2;
1614 __u8 disns = (nmic & 0x2) >> 1;
1615 __u8 shrns = nmic & 0x1;
1616
1617 t = stdout_bits_table_create();
1618 if (!t)
1619 return NULL((void*)0);
1620
1621 if (rsvd)
1622 stdout_bits_add(t, "[7:2]", rsvd, "Reserved");
1623 stdout_bits_add(t, "[1:1]", disns,
1624 "Namespace is %sa Dispersed Namespace",
1625 disns ? "" : "Not ");
1626 stdout_bits_add(t, "[0:0]", shrns, "Namespace Multipath %sCapable",
1627 shrns ? "" : "Not ");
1628
1629 return t;
1630}
1631
1632static struct shr_table *stdout_id_ns_rescap_table(__u8 rescap)
1633{
1634 struct shr_table *t;
1635 __u8 iekr = (rescap & 0x80) >> 7;
1636 __u8 eaar = (rescap & 0x40) >> 6;
1637 __u8 wear = (rescap & 0x20) >> 5;
1638 __u8 earo = (rescap & 0x10) >> 4;
1639 __u8 wero = (rescap & 0x8) >> 3;
1640 __u8 ea = (rescap & 0x4) >> 2;
1641 __u8 we = (rescap & 0x2) >> 1;
1642 __u8 ptpl = rescap & 0x1;
1643
1644 t = stdout_bits_table_create();
1645 if (!t)
1646 return NULL((void*)0);
1647
1648 stdout_bits_add(t, "[7:7]", iekr,
1649 "Ignore Existing Key - Used as defined in revision %s",
1650 iekr ? "1.3 or later" : "1.2.1 or earlier");
1651 stdout_bits_add(t, "[6:6]", eaar,
1652 "Exclusive Access - All Registrants %sSupported",
1653 eaar ? "" : "Not ");
1654 stdout_bits_add(t, "[5:5]", wear,
1655 "Write Exclusive - All Registrants %sSupported",
1656 wear ? "" : "Not ");
1657 stdout_bits_add(t, "[4:4]", earo,
1658 "Exclusive Access - Registrants Only %sSupported",
1659 earo ? "" : "Not ");
1660 stdout_bits_add(t, "[3:3]", wero,
1661 "Write Exclusive - Registrants Only %sSupported",
1662 wero ? "" : "Not ");
1663 stdout_bits_add(t, "[2:2]", ea, "Exclusive Access %sSupported",
1664 ea ? "" : "Not ");
1665 stdout_bits_add(t, "[1:1]", we, "Write Exclusive %sSupported",
1666 we ? "" : "Not ");
1667 stdout_bits_add(t, "[0:0]", ptpl,
1668 "Persist Through Power Loss %sSupported",
1669 ptpl ? "" : "Not ");
1670
1671 return t;
1672}
1673
1674static struct shr_table *stdout_id_ns_fpi_table(__u8 fpi)
1675{
1676 struct shr_table *t;
1677 __u8 fpis = (fpi & 0x80) >> 7;
1678 __u8 fpii = fpi & 0x7F;
1679
1680 t = stdout_bits_table_create();
1681 if (!t)
1682 return NULL((void*)0);
1683
1684 stdout_bits_add(t, "[7:7]", fpis,
1685 "Format Progress Indicator %sSupported",
1686 fpis ? "" : "Not ");
1687 if (fpis || (!fpis && fpii))
1688 stdout_bits_add(t, "[6:0]", fpii,
1689 "Format Progress Indicator (Remaining %d%%)",
1690 fpii);
1691
1692 return t;
1693}
1694
1695static struct shr_table *stdout_id_ns_nsattr_table(__u8 nsattr)
1696{
1697 struct shr_table *t;
1698 __u8 rsvd = (nsattr & 0xFE) >> 1;
1699 __u8 write_protected = nsattr & 0x1;
1700
1701 t = stdout_bits_table_create();
1702 if (!t)
1703 return NULL((void*)0);
1704
1705 if (rsvd)
1706 stdout_bits_add(t, "[7:1]", rsvd, "Reserved");
1707 stdout_bits_add(t, "[0:0]", write_protected,
1708 "Namespace %sWrite Protected",
1709 write_protected ? "" : "Not ");
1710
1711 return t;
1712}
1713
1714static struct shr_table *stdout_id_ns_dlfeat_table(__u8 dlfeat)
1715{
1716 struct shr_table *t;
1717 __u8 rsvd = (dlfeat & 0xE0) >> 5;
1718 __u8 guard = (dlfeat & 0x10) >> 4;
1719 __u8 dwz = (dlfeat & 0x8) >> 3;
1720 __u8 val = dlfeat & 0x7;
1721
1722 t = stdout_bits_table_create();
1723 if (!t)
1724 return NULL((void*)0);
1725
1726 if (rsvd)
1727 stdout_bits_add(t, "[7:5]", rsvd, "Reserved");
1728 stdout_bits_add(t, "[4:4]", guard,
1729 "Guard Field of Deallocated Logical Blocks is set to %s",
1730 guard ? "CRC of The Value Read" : "0xFFFF");
1731 stdout_bits_add(t, "[3:3]", dwz,
1732 "Deallocate Bit in the Write Zeroes Command is %sSupported",
1733 dwz ? "" : "Not ");
1734 stdout_bits_add(t, "[2:0]", val,
1735 "Bytes Read From a Deallocated Logical Block and its Metadata are %s",
1736 val == 2 ? "0xFF" :
1737 val == 1 ? "0x00" :
1738 val == 0 ? "Not Reported" : "Reserved Value");
1739
1740 return t;
1741}
1742
1743static struct shr_table *stdout_id_ns_kpios_table(__u8 kpios)
1744{
1745 struct shr_table *t;
1746 __u8 rsvd = (kpios & 0xfc) >> 2;
1747 __u8 kpiosns = (kpios & 0x2) >> 1;
1748 __u8 kpioens = kpios & 0x1;
1749
1750 t = stdout_bits_table_create();
1751 if (!t)
1752 return NULL((void*)0);
1753
1754 if (rsvd)
1755 stdout_bits_add(t, "[7:2]", rsvd, "Reserved");
1756 stdout_bits_add(t, "[1:1]", kpiosns,
1757 "Key Per I/O Capability %sSupported",
1758 kpiosns ? "" : "Not ");
1759 stdout_bits_add(t, "[0:0]", kpioens, "Key Per I/O Capability %s",
1760 kpioens ? "Enabled" : "Disabled");
1761
1762 return t;
1763}
1764
1765struct stdout_id_ns_lbaf_table_support {
1766 bool_Bool verbose;
1767 bool_Bool cap_only;
1768};
1769
1770static bool_Bool stdout_id_ns_lbaf_table_filter(const char *name, void *arg)
1771{
1772 const struct stdout_id_ns_lbaf_table_support *sup = arg;
1773
1774 if (!sup->verbose &&
1775 (!strcmp(name, "data_size") || !strcmp(name, "performance")))
1776 return false0;
1777 if (sup->cap_only && !strcmp(name, "in_use"))
1778 return false0;
1779
1780 return true1;
1781}
1782
1783static const char *stdout_id_ns_lbaf_rp_str(__u8 rp)
1784{
1785 switch (rp) {
1786 case 3:
1787 return "Degraded";
1788 case 2:
1789 return "Good";
1790 case 1:
1791 return "Better";
1792 default:
1793 return "Best";
1794 }
1795}
1796
1797static struct shr_table *stdout_id_ns_lbaf_table(struct nvme_id_ns *ns,
1798 bool_Bool cap_only)
1799{
1800 /* no_widen on "lbaf" and "lbads", see stdout_id_ctrl_ps_table(). */
1801 struct shr_table_column columns[] = {
1802 { "lbaf", RIGHT, AUTO_WIDTH2147483647, .no_widen = true1 },
1803 { "ms", RIGHT, AUTO_WIDTH2147483647 },
1804 { "lbads", RIGHT, AUTO_WIDTH2147483647, .no_widen = true1 },
1805 { "data_size", RIGHT, AUTO_WIDTH2147483647 },
1806 { "rp", RIGHT, AUTO_WIDTH2147483647 },
1807 { "performance", LEFT, AUTO_WIDTH2147483647 },
1808 { "in_use", LEFT, AUTO_WIDTH2147483647 },
1809 };
1810 struct shr_table *t;
1811 struct stdout_id_ns_lbaf_table_support sup = {
1812 .verbose = stdout_print_ops.flags & VERBOSE,
1813 .cap_only = cap_only,
1814 };
1815 __u8 flbas;
1816 int i;
1817
1818 t = shr_table_create();
1819 if (!t)
1820 return NULL((void*)0);
1821
1822 if (shr_table_add_columns_filter(t, columns, ARRAY_SIZE(columns)(sizeof(columns) / sizeof((columns)[0]) + 0),
1823 stdout_id_ns_lbaf_table_filter, &sup) < 0) {
1824 shr_table_free(t);
1825 return NULL((void*)0);
1826 }
1827
1828 nvme_id_ns_flbas_to_lbaf_inuse(ns->flbas, &flbas);
1829 for (i = 0; i < nvme_id_ns_nr_lbaf(ns); i++) {
1830 struct nvme_lbaf *lbaf = &ns->lbaf[i];
1831 int row = shr_table_get_row_id(t);
1832 int col = -1;
1833
1834 shr_table_set_value_int(t, ++col, row, i, RIGHT);
1835 shr_table_set_value_unsigned(t, ++col, row,
1836 le16_to_cpu(lbaf->ms), RIGHT);
1837 shr_table_set_value_unsigned(t, ++col, row, lbaf->ds, RIGHT);
1838 if (sup.verbose)
1839 shr_table_set_value_unsigned(t, ++col, row,
1840 nvme_lbaf_data_size(lbaf->ds), RIGHT);
1841 shr_table_set_value_unsigned(t, ++col, row, lbaf->rp, RIGHT);
1842 if (sup.verbose)
1843 shr_table_set_value_str(t, ++col, row,
1844 stdout_id_ns_lbaf_rp_str(lbaf->rp),
1845 LEFT);
1846 if (!cap_only)
1847 shr_table_set_value_str(t, ++col, row,
1848 i == flbas ? "yes" : "", LEFT);
1849
1850 shr_table_add_row(t, row);
1851 }
1852
1853 return t;
1854}
1855
1856void stdout_id_ns(struct nvme_id_ns *ns, unsigned int nsid,
1857 unsigned int lba_index, bool_Bool cap_only)
1858{
1859 bool_Bool verbose = stdout_print_ops.flags & VERBOSE;
1860 int vs = stdout_print_ops.flags & VS;
1861 struct shr_table *t;
1862 char nguid_buf[2 * sizeof(ns->nguid) + 1], *nguid = nguid_buf;
1863 char eui64_buf[2 * sizeof(ns->eui64) + 1], *eui64 = eui64_buf;
1864 int row, i;
1865
1866 t = stdout_kv_table_create();
1867 if (!t)
1868 return;
1869
1870 if (!cap_only) {
1871 printf("NVME Identify Namespace %d:\n", nsid);
1872
1873 if (verbose) {
1874 stdout_kv_add(t, "nsze",
1875 "%#"PRIx64"l" "x""\tTotal size in logical blocks",
1876 le64_to_cpu(ns->nsze));
1877 stdout_kv_add(t, "ncap",
1878 "%#"PRIx64"l" "x""\tMaximum size in logical blocks",
1879 le64_to_cpu(ns->ncap));
1880 stdout_kv_add(t, "nuse",
1881 "%#"PRIx64"l" "x""\tCurrent size in logical blocks",
1882 le64_to_cpu(ns->nuse));
1883 } else {
1884 stdout_kv_add(t, "nsze", "%#"PRIx64"l" "x",
1885 le64_to_cpu(ns->nsze));
1886 stdout_kv_add(t, "ncap", "%#"PRIx64"l" "x",
1887 le64_to_cpu(ns->ncap));
1888 stdout_kv_add(t, "nuse", "%#"PRIx64"l" "x",
1889 le64_to_cpu(ns->nuse));
1890 }
1891
1892 row = stdout_kv_add(t, "nsfeat", "%#x", ns->nsfeat);
1893 if (verbose)
1894 shr_table_set_row_subtable(t, row,
1895 stdout_id_ns_nsfeat_table(ns->nsfeat));
1896 } else {
1897 printf("NVMe Identify Namespace for LBA format[%d]:\n",
1898 lba_index);
1899 }
1900
1901 stdout_kv_add(t, "nlbaf", "%d", ns->nlbaf);
1902 if (!cap_only) {
1903 row = stdout_kv_add(t, "flbas", "%#x", ns->flbas);
1904 if (verbose)
1905 shr_table_set_row_subtable(t, row,
1906 stdout_id_ns_flbas_table(ns->flbas));
1907 }
1908
1909 row = stdout_kv_add(t, "mc", "%#x", ns->mc);
1910 if (verbose)
1911 shr_table_set_row_subtable(t, row,
1912 stdout_id_ns_mc_table(ns->mc));
1913
1914 row = stdout_kv_add(t, "dpc", "%#x", ns->dpc);
1915 if (verbose)
1916 shr_table_set_row_subtable(t, row,
1917 stdout_id_ns_dpc_table(ns->dpc));
1918
1919 if (!cap_only) {
1920 row = stdout_kv_add(t, "dps", "%#x", ns->dps);
1921 if (verbose)
1922 shr_table_set_row_subtable(t, row,
1923 stdout_id_ns_dps_table(ns->dps));
1924
1925 row = stdout_kv_add(t, "nmic", "%#x", ns->nmic);
1926 if (verbose)
1927 shr_table_set_row_subtable(t, row,
1928 stdout_id_ns_nmic_table(ns->nmic));
1929
1930 row = stdout_kv_add(t, "rescap", "%#x", ns->rescap);
1931 if (verbose)
1932 shr_table_set_row_subtable(t, row,
1933 stdout_id_ns_rescap_table(ns->rescap));
1934
1935 row = stdout_kv_add(t, "fpi", "%#x", ns->fpi);
1936 if (verbose)
1937 shr_table_set_row_subtable(t, row,
1938 stdout_id_ns_fpi_table(ns->fpi));
1939
1940 row = stdout_kv_add(t, "dlfeat", "%d", ns->dlfeat);
1941 if (verbose)
1942 shr_table_set_row_subtable(t, row,
1943 stdout_id_ns_dlfeat_table(ns->dlfeat));
1944
1945 stdout_kv_add(t, "nawun", "%d", le16_to_cpu(ns->nawun));
1946 stdout_kv_add(t, "nawupf", "%d", le16_to_cpu(ns->nawupf));
1947 stdout_kv_add(t, "nacwu", "%d", le16_to_cpu(ns->nacwu));
1948 stdout_kv_add(t, "nabsn", "%d", le16_to_cpu(ns->nabsn));
1949 stdout_kv_add(t, "nabo", "%d", le16_to_cpu(ns->nabo));
1950 stdout_kv_add(t, "nabspf", "%d", le16_to_cpu(ns->nabspf));
1951 stdout_kv_add(t, "noiob", "%d", le16_to_cpu(ns->noiob));
1952 stdout_kv_add(t, "nvmcap", "%s",
1953 uint128_t_to_l10n_string(
1954 le128_to_cpu(ns->nvmcap)));
1955 if (ns->nsfeat & 0x30) {
1956 stdout_kv_add(t, "npwg", "%u", le16_to_cpu(ns->npwg));
1957 stdout_kv_add(t, "npwa", "%u", le16_to_cpu(ns->npwa));
1958 if (ns->nsfeat & 0x10)
1959 stdout_kv_add(t, "npdg", "%u",
1960 le16_to_cpu(ns->npdg));
1961 stdout_kv_add(t, "npda", "%u", le16_to_cpu(ns->npda));
1962 stdout_kv_add(t, "nows", "%u", le16_to_cpu(ns->nows));
1963 }
1964 stdout_kv_add(t, "mssrl", "%u", le16_to_cpu(ns->mssrl));
1965 stdout_kv_add(t, "mcl", "%u", le32_to_cpu(ns->mcl));
1966 stdout_kv_add(t, "msrc", "%u", ns->msrc);
1967
1968 row = stdout_kv_add(t, "kpios", "%u", ns->kpios);
1969 if (verbose)
1970 shr_table_set_row_subtable(t, row,
1971 stdout_id_ns_kpios_table(ns->kpios));
1972 }
1973
1974 stdout_kv_add(t, "nulbaf", "%u", ns->nulbaf);
1975 if (!cap_only) {
1976 stdout_kv_add(t, "kpiodaag", "%u", le32_to_cpu(ns->kpiodaag));
1977 stdout_kv_add(t, "anagrpid", "%u", le32_to_cpu(ns->anagrpid));
1978
1979 row = stdout_kv_add(t, "nsattr", "%u", ns->nsattr);
1980 if (verbose)
1981 shr_table_set_row_subtable(t, row,
1982 stdout_id_ns_nsattr_table(ns->nsattr));
1983
1984 stdout_kv_add(t, "nvmsetid", "%d", le16_to_cpu(ns->nvmsetid));
1985 stdout_kv_add(t, "endgid", "%d", le16_to_cpu(ns->endgid));
1986
1987 for (i = 0; i < (int)sizeof(ns->nguid); i++)
1988 nguid += sprintf(nguid, "%02x", ns->nguid[i]);
1989 stdout_kv_add(t, "nguid", "%s", nguid_buf);
1990
1991 for (i = 0; i < (int)sizeof(ns->eui64); i++)
1992 eui64 += sprintf(eui64, "%02x", ns->eui64[i]);
1993 stdout_kv_add(t, "eui64", "%s", eui64_buf);
1994 }
1995
1996 row = stdout_kv_add(t, "lbaf", "%d formats",
1997 ns->nlbaf + ns->nulbaf + 1);
1998 shr_table_set_row_subtable(t, row,
1999 stdout_id_ns_lbaf_table(ns, cap_only));
2000
2001 stdout_kv_table_finish(t, "identify-namespace");
2002
2003 if (vs && !cap_only) {
2004 printf("vs[]:\n");
2005 d(ns->vs, sizeof(ns->vs), 16, 1);
2006 }
2007}
2008
2009static struct shr_table *
2010stdout_cmd_set_independent_id_ns_nsfeat_table(__u8 nsfeat)
2011{
2012 struct shr_table *t;
2013 __u8 rsvd6 = (nsfeat & 0xE0) >> 6;
2014 __u8 vwcnp = (nsfeat & 0x20) >> 5;
2015 __u8 rmedia = (nsfeat & 0x10) >> 4;
2016 __u8 uidreuse = (nsfeat & 0x8) >> 3;
2017 __u8 rsvd0 = (nsfeat & 0x7);
2018
2019 t = stdout_bits_table_create();
2020 if (!t)
2021 return NULL((void*)0);
2022
2023 if (rsvd6)
2024 stdout_bits_add(t, "[7:6]", rsvd6, "Reserved");
2025 stdout_bits_add(t, "[5:5]", vwcnp,
2026 "Volatile Write Cache is %sPresent",
2027 vwcnp ? "" : "Not ");
2028 stdout_bits_add(t, "[4:4]", rmedia,
2029 "Namespace %sstore data on rotational media",
2030 rmedia ? "" : "does not ");
2031 stdout_bits_add(t, "[3:3]", uidreuse,
2032 "NGUID and EUI64 fields if non-zero, %sReused",
2033 uidreuse ? "Never " : "");
2034 if (rsvd0)
2035 stdout_bits_add(t, "[2:0]", rsvd0, "Reserved");
2036
2037 return t;
2038}
2039
2040static struct shr_table *
2041stdout_cmd_set_independent_id_ns_nstat_table(__u8 nstat)
2042{
2043 struct shr_table *t;
2044 __u8 rsvd3 = (nstat & 0xf8) >> 3;
2045 __u8 ioi = (nstat & 0x6) >> 1;
2046 __u8 nrdy = nstat & 0x1;
2047
2048 static const char * const ioi_string[] = {
2049 "I/O performance degradation is not reported",
2050 "Reserved",
2051 "I/O performance is not currently degraded",
2052 "I/O performance is currently degraded"
2053 };
2054
2055 t = stdout_bits_table_create();
2056 if (!t)
2057 return NULL((void*)0);
2058
2059 if (rsvd3)
2060 stdout_bits_add(t, "[7:3]", rsvd3, "Reserved");
2061 stdout_bits_add(t, "[2:1]", ioi, "%s", ioi_string[ioi]);
2062 stdout_bits_add(t, "[0:0]", nrdy, "Name space is %sready",
2063 nrdy ? "" : "not ");
2064
2065 return t;
2066}
2067
2068void stdout_cmd_set_independent_id_ns(struct nvme_id_independent_id_ns *ns,
2069 unsigned int nsid)
2070{
2071 bool_Bool verbose = stdout_print_ops.flags & VERBOSE;
2072 struct shr_table *t;
2073 int row;
2074
2075 printf("NVME Identify Command Set Independent Namespace %d:\n", nsid);
2076
2077 t = stdout_kv_table_create();
2078 if (!t)
2079 return;
2080
2081 row = stdout_kv_add(t, "nsfeat", "%#x", ns->nsfeat);
2082 if (verbose)
2083 shr_table_set_row_subtable(t, row,
2084 stdout_cmd_set_independent_id_ns_nsfeat_table(
2085 ns->nsfeat));
2086
2087 row = stdout_kv_add(t, "nmic", "%#x", ns->nmic);
2088 if (verbose)
2089 shr_table_set_row_subtable(t, row,
2090 stdout_id_ns_nmic_table(ns->nmic));
2091
2092 row = stdout_kv_add(t, "rescap", "%#x", ns->rescap);
2093 if (verbose)
2094 shr_table_set_row_subtable(t, row,
2095 stdout_id_ns_rescap_table(ns->rescap));
2096
2097 row = stdout_kv_add(t, "fpi", "%#x", ns->fpi);
2098 if (verbose)
2099 shr_table_set_row_subtable(t, row,
2100 stdout_id_ns_fpi_table(ns->fpi));
2101
2102 stdout_kv_add(t, "anagrpid", "%u", le32_to_cpu(ns->anagrpid));
2103
2104 row = stdout_kv_add(t, "nsattr", "%u", ns->nsattr);
2105 if (verbose)
2106 shr_table_set_row_subtable(t, row,
2107 stdout_id_ns_nsattr_table(ns->nsattr));
2108
2109 stdout_kv_add(t, "nvmsetid", "%d", le16_to_cpu(ns->nvmsetid));
2110 stdout_kv_add(t, "endgid", "%d", le16_to_cpu(ns->endgid));
2111
2112 row = stdout_kv_add(t, "nstat", "%#x", ns->nstat);
2113 if (verbose)
2114 shr_table_set_row_subtable(t, row,
2115 stdout_cmd_set_independent_id_ns_nstat_table(
2116 ns->nstat));
2117
2118 row = stdout_kv_add(t, "kpios", "%#x", ns->kpios);
2119 if (verbose)
2120 shr_table_set_row_subtable(t, row,
2121 stdout_id_ns_kpios_table(ns->kpios));
2122
2123 stdout_kv_add(t, "maxkt", "%#x", le16_to_cpu(ns->maxkt));
2124 stdout_kv_add(t, "rgrpid", "%#x", le32_to_cpu(ns->rgrpid));
2125
2126 stdout_kv_table_finish(t, "id-independent-id-ns");
2127}
2128
2129void stdout_id_ns_descs(void *data, unsigned int nsid)
2130{
2131 struct nvme_ns_id_desc *cur;
2132 size_t pos;
2133 int i, verbose = stdout_print_ops.flags & VERBOSE;
2134 __u8 uuid[NVME_UUID_LEN16];
2135 char uuid_str[NVME_UUID_LEN_STRING37];
2136 __u8 eui64[8];
2137 __u8 nguid[16];
2138 __u8 csi;
2139 struct shr_table *t;
2140 char hex[NVME_UUID_LEN16 * 2 + 1], *hp;
2141
2142 printf("NVME Namespace Identification Descriptors NS %d:\n", nsid);
2143
2144 t = stdout_kv_table_create();
2145 if (!t)
2146 return;
2147
2148 for (pos = 0; (cur = nvme_ns_id_desc(data, pos));
2149 pos += sizeof(*cur) + cur->nidl) {
2150 if (verbose) {
2151 stdout_kv_add(t, "loc", "%zu", pos);
2152 stdout_kv_add(t, "nidt", "%d", (int)cur->nidt);
2153 stdout_kv_add(t, "nidl", "%d", (int)cur->nidl);
2154 }
2155
2156 switch (nvme_ns_id_desc_type(cur)) {
2157 case NVME_NIDT_EUI64:
2158 memcpy(eui64, data + pos + sizeof(*cur), sizeof(eui64));
2159 if (verbose)
2160 stdout_kv_add(t, "type", "%s", "eui64");
2161 hp = hex;
2162 for (i = 0; i < 8; i++)
2163 hp += sprintf(hp, "%02x", eui64[i]);
2164 stdout_kv_add(t, "eui64", "%s", hex);
2165 break;
2166 case NVME_NIDT_NGUID:
2167 memcpy(nguid, data + pos + sizeof(*cur), sizeof(nguid));
2168 if (verbose)
2169 stdout_kv_add(t, "type", "%s", "nguid");
2170 hp = hex;
2171 for (i = 0; i < 16; i++)
2172 hp += sprintf(hp, "%02x", nguid[i]);
2173 stdout_kv_add(t, "nguid", "%s", hex);
2174 break;
2175 case NVME_NIDT_UUID:
2176 memcpy(uuid, data + pos + sizeof(*cur), 16);
2177 libnvme_uuid_to_string(uuid, uuid_str);
2178 if (verbose)
2179 stdout_kv_add(t, "type", "%s", "uuid");
2180 stdout_kv_add(t, "uuid", "%s", uuid_str);
2181 break;
2182 case NVME_NIDT_CSI:
2183 memcpy(&csi, data + pos + sizeof(*cur), 1);
2184 if (verbose)
2185 stdout_kv_add(t, "type", "%s", "csi");
2186 stdout_kv_add(t, "csi", "%#x", csi);
2187 break;
2188 default:
2189 /* Skip unknown types */
2190 break;
2191 }
2192 }
2193
2194 stdout_kv_table_finish(t, "id-ns-descs");
2195}
2196
2197/*
2198 * Only for &struct nvme_id_psd's idlp/actp: unlike
2199 * stdout_power_and_scale_str()'s other callers (Power Limit/Threshold
2200 * features, Interval Power Measurement, power-meas-log), the Power State
2201 * Descriptor spec text says a raw value of 0 means "not reported"
2202 * independent of the scale field.
2203 */
2204static char *stdout_psd_power_str(__u16 power, __u8 scale)
2205{
2206 char *s = NULL((void*)0);
2207
2208 if (!power) {
2209 if (asprintf(&s, "-") < 0)
2210 s = NULL((void*)0);
2211 return s;
2212 }
2213
2214 return stdout_power_and_scale_str(power, scale);
2215}
2216
2217static char *stdout_bandwidth_and_scale_str(__u8 bw, __u8 scale)
2218{
2219 char *s = NULL((void*)0);
2220
2221 if (!bw) {
2222 if (asprintf(&s, "-") < 0)
2223 s = NULL((void*)0);
2224 return s;
2225 }
2226
2227 switch (scale & 0x7) {
2228 case NVME_PSD_MBWS_1_MIB_S:
2229 if (asprintf(&s, "%uMiB/s", bw) < 0)
2230 s = NULL((void*)0);
2231 break;
2232 case NVME_PSD_MBWS_10_MIB_S:
2233 if (asprintf(&s, "%uMiB/s", bw * 10) < 0)
2234 s = NULL((void*)0);
2235 break;
2236 case NVME_PSD_MBWS_100_MIB_S:
2237 if (asprintf(&s, "%uMiB/s", bw * 100) < 0)
2238 s = NULL((void*)0);
2239 break;
2240 case NVME_PSD_MBWS_1_GIB_S:
2241 if (asprintf(&s, "%uGiB/s", bw) < 0)
2242 s = NULL((void*)0);
2243 break;
2244 case NVME_PSD_MBWS_10_GIB_S:
2245 if (asprintf(&s, "%uGiB/s", bw * 10) < 0)
2246 s = NULL((void*)0);
2247 break;
2248 case NVME_PSD_MBWS_100_GIB_S:
2249 if (asprintf(&s, "%uGiB/s", bw * 100) < 0)
2250 s = NULL((void*)0);
2251 break;
2252 default:
2253 if (asprintf(&s, "reserved") < 0)
2254 s = NULL((void*)0);
2255 break;
2256 }
2257
2258 return s;
2259}
2260
2261static char *stdout_psd_workload_str(__u8 apw)
2262{
2263 const char *s;
2264
2265 switch (apw & 0x7) {
18
Control jumps to the 'default' case at line 2275
2266 case NVME_PSD_WORKLOAD_NP:
2267 s = "-";
2268 break;
2269 case 1:
2270 s = "1MiB 32 RW, 30s idle";
2271 break;
2272 case 2:
2273 s = "80K 128KiB SW";
2274 break;
2275 default:
2276 s = "reserved";
2277 break;
2278 }
2279
2280 return strdup(s);
19
Memory is allocated
2281}
2282
2283/*
2284 * Multiplies @time by @ts's scale up front -- e.g. "60us" (6 counts of 10
2285 * microseconds each) rather than leaving that math to the reader. @ts values
2286 * beyond the scale table are reserved.
2287 */
2288static char *stdout_psd_time_str(__u8 time, __u8 ts)
2289{
2290 static const struct {
2291 unsigned int mult;
2292 const char *unit;
2293 } scale[] = {
2294 { 1, "us" }, { 10, "us" }, { 100, "us" },
2295 { 1, "ms" }, { 10, "ms" }, { 100, "ms" },
2296 { 1, "s" }, { 10, "s" }, { 100, "s" },
2297 { 1000, "s" }, { 10000, "s" }, { 100000, "s" },
2298 { 1000000, "s" },
2299 };
2300 char *s = NULL((void*)0);
2301
2302 switch (time) {
2303 case 0:
2304 if (asprintf(&s, "-") < 0)
2305 s = NULL((void*)0);
2306 break;
2307 case 1 ... 99:
2308 if (ts >= ARRAY_SIZE(scale)(sizeof(scale) / sizeof((scale)[0]) + 0)) {
2309 if (asprintf(&s, "reserved") < 0)
2310 s = NULL((void*)0);
2311 } else if (asprintf(&s, "%u%s", time * scale[ts].mult,
2312 scale[ts].unit) < 0) {
2313 s = NULL((void*)0);
2314 }
2315 break;
2316 default:
2317 if (asprintf(&s, "reserved") < 0)
2318 s = NULL((void*)0);
2319 break;
2320 }
2321
2322 return s;
2323}
2324
2325/* @lat is in microseconds; a value of 0 means "not reported". */
2326static char *stdout_psd_latency_str(__u32 lat)
2327{
2328 char *s = NULL((void*)0);
2329
2330 if (!lat) {
2331 if (asprintf(&s, "-") < 0)
2332 s = NULL((void*)0);
2333 } else if (asprintf(&s, "%uus", lat) < 0) {
2334 s = NULL((void*)0);
2335 }
2336
2337 return s;
2338}
2339
2340struct stdout_id_ctrl_ps_table_support {
2341 bool_Bool iiellss;
2342 bool_Bool plsepf;
2343 bool_Bool plsfq;
2344 bool_Bool idle_power_used;
2345 bool_Bool active_power_used;
2346 bool_Bool workload_used;
2347 bool_Bool max_bandwidth_used;
2348 bool_Bool verbose;
2349};
2350
2351static bool_Bool stdout_id_ctrl_ps_table_filter(const char *name, void *arg)
2352{
2353 const struct stdout_id_ctrl_ps_table_support *sup = arg;
2354
2355 if (sup->verbose)
2356 return true1;
2357 if (!sup->iiellss && !strcmp(name, "miiell"))
2358 return false0;
2359 if (!sup->plsepf && (!strcmp(name, "epfrt") || !strcmp(name, "epfvt")))
2360 return false0;
2361 if (!sup->plsfq && !strcmp(name, "fqvt"))
2362 return false0;
2363 if (!sup->idle_power_used && !strcmp(name, "idle_power"))
2364 return false0;
2365 if (!sup->active_power_used && !strcmp(name, "active_power"))
2366 return false0;
2367 if (!sup->workload_used && !strcmp(name, "workload"))
2368 return false0;
2369 if (!sup->max_bandwidth_used && !strcmp(name, "max_bandwidth"))
2370 return false0;
2371
2372 return true1;
2373}
2374
2375static bool_Bool stdout_id_ctrl_ps_idlp_used(struct nvme_id_ctrl *ctrl)
2376{
2377 int i;
2378
2379 for (i = 0; i < nvme_id_ctrl_nr_psd(ctrl); i++) {
2380 if (le16_to_cpu(ctrl->psd[i].idlp))
2381 return true1;
2382 }
2383
2384 return false0;
2385}
2386
2387static bool_Bool stdout_id_ctrl_ps_actp_used(struct nvme_id_ctrl *ctrl)
2388{
2389 int i;
2390
2391 for (i = 0; i < nvme_id_ctrl_nr_psd(ctrl); i++) {
2392 if (le16_to_cpu(ctrl->psd[i].actp))
2393 return true1;
2394 }
2395
2396 return false0;
2397}
2398
2399static bool_Bool stdout_id_ctrl_ps_apw_used(struct nvme_id_ctrl *ctrl)
2400{
2401 int i;
2402
2403 for (i = 0; i < nvme_id_ctrl_nr_psd(ctrl); i++) {
2404 if (ctrl->psd[i].apws & 0x7)
2405 return true1;
2406 }
2407
2408 return false0;
2409}
2410
2411static bool_Bool stdout_id_ctrl_ps_mbw_used(struct nvme_id_ctrl *ctrl)
2412{
2413 int i;
2414
2415 for (i = 0; i < nvme_id_ctrl_nr_psd(ctrl); i++) {
2416 if (ctrl->psd[i].mbw)
2417 return true1;
2418 }
2419
2420 return false0;
2421}
2422
2423/*
2424 * One row per power state, one column per sub-field -- unlike the bit-decode
2425 * subtables, which are one row per bit range -- since every power state
2426 * repeats the same fixed set of fields: a real table, not a "name : value"
2427 * list. Attached unconditionally, not just under -v.
2428 */
2429static struct shr_table *stdout_id_ctrl_ps_table(struct nvme_id_ctrl *ctrl)
2430{
2431 /*
2432 * no_widen on "ps" and "state": columns 0 and 2 are what
2433 * shr_table_align_column() widens to line up the outer table's
2434 * "name :" and the bits subtables' "value" column, and this table
2435 * happens to have its own columns at those same indices -- which do
2436 * not mean the same thing, so they must opt out.
2437 */
2438 struct shr_table_column columns[] = {
2439 { "ps", RIGHT, AUTO_WIDTH2147483647, .no_widen = true1 },
2440 { "mp", RIGHT, AUTO_WIDTH2147483647 },
2441 { "state", LEFT, AUTO_WIDTH2147483647, .no_widen = true1 },
2442 { "enlat", RIGHT, AUTO_WIDTH2147483647 },
2443 { "exlat", RIGHT, AUTO_WIDTH2147483647 },
2444 { "rrt", RIGHT, AUTO_WIDTH2147483647 },
2445 { "rrl", RIGHT, AUTO_WIDTH2147483647 },
2446 { "rwt", RIGHT, AUTO_WIDTH2147483647 },
2447 { "rwl", RIGHT, AUTO_WIDTH2147483647 },
2448 { "idle_power", RIGHT, AUTO_WIDTH2147483647 },
2449 { "active_power", RIGHT, AUTO_WIDTH2147483647 },
2450 { "workload", LEFT, AUTO_WIDTH2147483647 },
2451 { "epfrt", LEFT, AUTO_WIDTH2147483647 },
2452 { "fqvt", LEFT, AUTO_WIDTH2147483647 },
2453 { "epfvt", LEFT, AUTO_WIDTH2147483647 },
2454 { "max_bandwidth", RIGHT, AUTO_WIDTH2147483647 },
2455 { "miiell", RIGHT, AUTO_WIDTH2147483647 },
2456 };
2457 struct shr_table *t;
2458 struct stdout_id_ctrl_ps_table_support sup = {
2459 .iiellss = NVME_CTRL_CTRATT_IIELLSS(le32_to_cpu(ctrl->ctratt))(((le32_to_cpu(ctrl->ctratt)) >> NVME_CTRL_CTRATT_IIELLSS_SHIFT
) & NVME_CTRL_CTRATT_IIELLSS_MASK)
,
2460 .plsepf = NVME_CTRL_PLSI_PLSEPF(ctrl->plsi)(((ctrl->plsi) >> NVME_CTRL_PLSI_PLSEPF_SHIFT) &
NVME_CTRL_PLSI_PLSEPF_MASK)
,
2461 .plsfq = NVME_CTRL_PLSI_PLSFQ(ctrl->plsi)(((ctrl->plsi) >> NVME_CTRL_PLSI_PLSFQ_SHIFT) & NVME_CTRL_PLSI_PLSFQ_MASK
)
,
2462 .idle_power_used = stdout_id_ctrl_ps_idlp_used(ctrl),
2463 .active_power_used = stdout_id_ctrl_ps_actp_used(ctrl),
2464 .workload_used = stdout_id_ctrl_ps_apw_used(ctrl),
2465 .max_bandwidth_used = stdout_id_ctrl_ps_mbw_used(ctrl),
2466 .verbose = stdout_print_ops.flags & VERBOSE,
2467 };
2468 int i;
2469
2470 t = shr_table_create();
2471 if (!t)
6
Assuming 't' is non-null
7
Taking false branch
2472 return NULL((void*)0);
2473
2474 if (shr_table_add_columns_filter(t, columns, ARRAY_SIZE(columns)(sizeof(columns) / sizeof((columns)[0]) + 0),
8
Assuming the condition is false
9
Taking false branch
2475 stdout_id_ctrl_ps_table_filter, &sup) < 0) {
2476 shr_table_free(t);
2477 return NULL((void*)0);
2478 }
2479
2480 for (i = 0; i < nvme_id_ctrl_nr_psd(ctrl); i++) {
10
Loop condition is true. Entering loop body
2481 struct nvme_id_psd *psd = &ctrl->psd[i];
2482 __u16 max_power = le16_to_cpu(psd->mp);
2483 __cleanup_free__attribute__((cleanup(shr_freep))) char *mp = NULL((void*)0);
2484 __cleanup_free__attribute__((cleanup(shr_freep))) char *enlat = NULL((void*)0);
2485 __cleanup_free__attribute__((cleanup(shr_freep))) char *exlat = NULL((void*)0);
2486 __cleanup_free__attribute__((cleanup(shr_freep))) char *idle_power = NULL((void*)0);
2487 __cleanup_free__attribute__((cleanup(shr_freep))) char *active_power = NULL((void*)0);
2488 __cleanup_free__attribute__((cleanup(shr_freep))) char *workload = NULL((void*)0);
2489 __cleanup_free__attribute__((cleanup(shr_freep))) char *epfrt = NULL((void*)0);
2490 __cleanup_free__attribute__((cleanup(shr_freep))) char *fqvt = NULL((void*)0);
2491 __cleanup_free__attribute__((cleanup(shr_freep))) char *epfvt = NULL((void*)0);
2492 __cleanup_free__attribute__((cleanup(shr_freep))) char *max_bandwidth = NULL((void*)0);
2493 __cleanup_free__attribute__((cleanup(shr_freep))) char *miiell = NULL((void*)0);
2494 int row = shr_table_get_row_id(t);
2495 int col = -1;
2496
2497 if (!max_power) {
11
Assuming 'max_power' is not equal to 0
12
Taking false branch
2498 if (asprintf(&mp, "-") < 0)
2499 mp = NULL((void*)0);
2500 } else if (psd->flags & NVME_PSD_FLAGS_MXPS) {
13
Assuming the condition is false
14
Taking false branch
2501 if (asprintf(&mp, "%01u.%04uW",
2502 max_power / 10000, max_power % 10000) < 0)
2503 mp = NULL((void*)0);
2504 } else {
2505 if (asprintf(&mp, "%01u.%02uW",
15
Assuming the condition is false
16
Taking false branch
2506 max_power / 100, max_power % 100) < 0)
2507 mp = NULL((void*)0);
2508 }
2509
2510 idle_power = stdout_psd_power_str(
2511 le16_to_cpu(psd->idlp),
2512 nvme_psd_power_scale(psd->ips));
2513 active_power = stdout_psd_power_str(
2514 le16_to_cpu(psd->actp),
2515 nvme_psd_power_scale(psd->apws));
2516 workload = stdout_psd_workload_str(psd->apws);
17
Calling 'stdout_psd_workload_str'
20
Returned allocated memory
2517 if (sup.plsepf) {
21
Assuming field 'plsepf' is false
22
Taking false branch
2518 epfrt = stdout_psd_time_str(psd->epfrt,
2519 psd->epfr_fqv_ts & 0xf);
2520 epfvt = stdout_psd_time_str(psd->epfvt,
2521 psd->epfvts & 0xf);
2522 }
2523 if (sup.plsfq)
23
Assuming field 'plsfq' is false
24
Taking false branch
2524 fqvt = stdout_psd_time_str(psd->fqvt,
2525 psd->epfr_fqv_ts >> 4);
2526 max_bandwidth = stdout_bandwidth_and_scale_str(psd->mbw,
2527 psd->mbws);
2528 enlat = stdout_psd_latency_str(le32_to_cpu(psd->enlat));
2529 exlat = stdout_psd_latency_str(le32_to_cpu(psd->exlat));
2530
2531 if (sup.iiellss) {
25
Assuming field 'iiellss' is false
26
Taking false branch
2532 __u16 miiell_val = le16_to_cpu(psd->miiell);
2533
2534 if (miiell_val) {
2535 if (asprintf(&miiell, "%uus",
2536 miiell_val * 100) < 0)
2537 miiell = NULL((void*)0);
2538 } else {
2539 if (asprintf(&miiell, "none") < 0)
2540 miiell = NULL((void*)0);
2541 }
2542 }
2543
2544 shr_table_set_value_int(t, ++col, row, i, RIGHT);
2545 shr_table_set_value_str(t, ++col, row, mp ?: "-", RIGHT);
27
'?' condition is false
2546 shr_table_set_value_str(t, ++col, row,
2547 psd->flags & NVME_PSD_FLAGS_NOPS ?
28
Assuming the condition is false
29
'?' condition is false
2548 "non-operational" : "operational",
2549 LEFT);
2550 shr_table_set_value_str(t, ++col, row, enlat ?: "-", RIGHT);
30
'?' condition is false
2551 shr_table_set_value_str(t, ++col, row, exlat ?: "-", RIGHT);
31
'?' condition is false
2552 shr_table_set_value_unsigned(t, ++col, row, psd->rrt, RIGHT);
2553 shr_table_set_value_unsigned(t, ++col, row, psd->rrl, RIGHT);
2554 shr_table_set_value_unsigned(t, ++col, row, psd->rwt, RIGHT);
2555 shr_table_set_value_unsigned(t, ++col, row, psd->rwl, RIGHT);
2556 if (sup.idle_power_used || sup.verbose)
32
Assuming field 'idle_power_used' is false
33
Assuming field 'verbose' is false
2557 shr_table_set_value_str(t, ++col, row,
2558 idle_power ?: "-", RIGHT);
2559 if (sup.active_power_used || sup.verbose
34.1
Field 'verbose' is false
)
34
Assuming field 'active_power_used' is false
2560 shr_table_set_value_str(t, ++col, row,
2561 active_power ?: "-", RIGHT);
2562 if (sup.workload_used || sup.verbose
35.1
Field 'verbose' is false
)
35
Assuming field 'workload_used' is false
36
Taking false branch
2563 shr_table_set_value_str(t, ++col, row,
2564 workload ?: "-", LEFT);
2565 if (sup.plsepf || sup.verbose)
37
Potential leak of memory pointed to by 'workload'
2566 shr_table_set_value_str(t, ++col, row,
2567 epfrt ?: "-", LEFT);
2568 if (sup.plsfq || sup.verbose)
2569 shr_table_set_value_str(t, ++col, row,
2570 fqvt ?: "-", LEFT);
2571 if (sup.plsepf || sup.verbose)
2572 shr_table_set_value_str(t, ++col, row,
2573 epfvt ?: "-", LEFT);
2574 if (sup.max_bandwidth_used || sup.verbose)
2575 shr_table_set_value_str(t, ++col, row,
2576 max_bandwidth ?: "-", RIGHT);
2577 if (sup.iiellss || sup.verbose)
2578 shr_table_set_value_str(t, ++col, row,
2579 miiell ?: "-", RIGHT);
2580
2581 shr_table_add_row(t, row);
2582 }
2583
2584 return t;
2585}
2586
2587static void stdout_id_ctrl_cap_feat(struct nvme_id_ctrl *ctrl,
2588 struct shr_table *t, bool_Bool verbose)
2589{
2590 char sn[sizeof(ctrl->sn) + 1];
2591 char mn[sizeof(ctrl->mn) + 1];
2592 char fr[sizeof(ctrl->fr) + 1];
2593 int row;
2594
2595 snprintf(sn, sizeof(sn), "%-.*s", (int)sizeof(ctrl->sn), ctrl->sn);
2596 snprintf(mn, sizeof(mn), "%-.*s", (int)sizeof(ctrl->mn), ctrl->mn);
2597 snprintf(fr, sizeof(fr), "%-.*s", (int)sizeof(ctrl->fr), ctrl->fr);
2598
2599 if (verbose)
2600 stdout_kv_add(t, "255:00",
2601 "Controller Capabilities and Features");
2602
2603 stdout_kv_add(t, "vid", "%#x", le16_to_cpu(ctrl->vid));
2604 stdout_kv_add(t, "ssvid", "%#x", le16_to_cpu(ctrl->ssvid));
2605 stdout_kv_add(t, "sn", "%s", shr_rtrim(sn));
2606 stdout_kv_add(t, "mn", "%s", shr_rtrim(mn));
2607 stdout_kv_add(t, "fr", "%s", shr_rtrim(fr));
2608 stdout_kv_add(t, "rab", "%d", ctrl->rab);
2609 stdout_kv_add(t, "ieee", "%02x%02x%02x",
2610 ctrl->ieee[2], ctrl->ieee[1], ctrl->ieee[0]);
2611
2612 row = stdout_kv_add(t, "cmic", "%#x", ctrl->cmic);
2613 if (verbose)
2614 shr_table_set_row_subtable(t, row,
2615 stdout_id_ctrl_cmic_table(ctrl->cmic));
2616
2617 stdout_kv_add(t, "mdts", "%d", ctrl->mdts);
2618 stdout_kv_add(t, "cntlid", "%#x", le16_to_cpu(ctrl->cntlid));
2619 stdout_kv_add(t, "ver", "%#x", le32_to_cpu(ctrl->ver));
2620 stdout_kv_add(t, "rtd3r", "%#x", le32_to_cpu(ctrl->rtd3r));
2621 stdout_kv_add(t, "rtd3e", "%#x", le32_to_cpu(ctrl->rtd3e));
2622
2623 row = stdout_kv_add(t, "oaes", "%#x", le32_to_cpu(ctrl->oaes));
2624 if (verbose)
2625 shr_table_set_row_subtable(t, row,
2626 stdout_id_ctrl_oaes_table(ctrl->oaes));
2627
2628 row = stdout_kv_add(t, "ctratt", "%#x", le32_to_cpu(ctrl->ctratt));
2629 if (verbose)
2630 shr_table_set_row_subtable(t, row,
2631 stdout_id_ctrl_ctratt_table(ctrl->ctratt));
2632
2633 stdout_kv_add(t, "rrls", "%#x", le16_to_cpu(ctrl->rrls));
2634
2635 row = stdout_kv_add(t, "bpcap", "%#x", le16_to_cpu(ctrl->bpcap));
2636 if (verbose)
2637 shr_table_set_row_subtable(t, row,
2638 stdout_id_ctrl_bpcap_table(ctrl->bpcap));
2639
2640 row = stdout_kv_add(t, "chsi", "%#x", ctrl->chsi);
2641 if (verbose)
2642 shr_table_set_row_subtable(t, row,
2643 stdout_id_ctrl_chsi_table(ctrl->chsi));
2644
2645 stdout_kv_add(t, "nssl", "%#x", le32_to_cpu(ctrl->nssl));
2646
2647 row = stdout_kv_add(t, "plsi", "%u", ctrl->plsi);
2648 if (verbose)
2649 shr_table_set_row_subtable(t, row,
2650 stdout_id_ctrl_plsi_table(ctrl->plsi));
2651
2652 row = stdout_kv_add(t, "cntrltype", "%d", ctrl->cntrltype);
2653 if (verbose)
2654 shr_table_set_row_subtable(t, row,
2655 stdout_id_ctrl_cntrltype_table(ctrl->cntrltype));
2656
2657 stdout_kv_add(t, "fguid", "%s", shr_uuid_to_string(ctrl->fguid));
2658 stdout_kv_add(t, "crdt1", "%u", le16_to_cpu(ctrl->crdt1));
2659 stdout_kv_add(t, "crdt2", "%u", le16_to_cpu(ctrl->crdt2));
2660 stdout_kv_add(t, "crdt3", "%u", le16_to_cpu(ctrl->crdt3));
2661
2662 row = stdout_kv_add(t, "crcap", "%u", ctrl->crcap);
2663 if (verbose)
2664 shr_table_set_row_subtable(t, row,
2665 stdout_id_ctrl_crcap_table(ctrl->crcap));
2666
2667 stdout_kv_add(t, "ciu", "%u", ctrl->ciu);
2668 stdout_kv_add(t, "cirn", "%"PRIu64"l" "u",
2669 le64_to_cpu(*(__le64 *)ctrl->cirn));
2670
2671 row = stdout_kv_add(t, "nvmsr", "%u", ctrl->nvmsr);
2672 if (verbose)
2673 shr_table_set_row_subtable(t, row,
2674 stdout_id_ctrl_nvmsr_table(ctrl->nvmsr));
2675
2676 row = stdout_kv_add(t, "vwci", "%u", ctrl->vwci);
2677 if (verbose)
2678 shr_table_set_row_subtable(t, row,
2679 stdout_id_ctrl_vwci_table(ctrl->vwci));
2680
2681 row = stdout_kv_add(t, "mec", "%u", ctrl->mec);
2682 if (verbose)
2683 shr_table_set_row_subtable(t, row,
2684 stdout_id_ctrl_mec_table(ctrl->mec));
2685}
2686
2687static void stdout_id_ctrl_admin_option(struct nvme_id_ctrl *ctrl,
2688 struct shr_table *t, bool_Bool verbose)
2689{
2690 int row;
2691
2692 if (verbose)
2693 stdout_kv_add(t, "511:256",
2694 "Admin Command Set Attributes & Optional Controller Capabilities");
2695
2696 row = stdout_kv_add(t, "oacs", "%#x", le16_to_cpu(ctrl->oacs));
2697 if (verbose)
2698 shr_table_set_row_subtable(t, row,
2699 stdout_id_ctrl_oacs_table(ctrl->oacs));
2700
2701 stdout_kv_add(t, "acl", "%d", ctrl->acl);
2702 stdout_kv_add(t, "aerl", "%d", ctrl->aerl);
2703
2704 row = stdout_kv_add(t, "frmw", "%#x", ctrl->frmw);
2705 if (verbose)
2706 shr_table_set_row_subtable(t, row,
2707 stdout_id_ctrl_frmw_table(ctrl->frmw));
2708
2709 row = stdout_kv_add(t, "lpa", "%#x", ctrl->lpa);
2710 if (verbose)
2711 shr_table_set_row_subtable(t, row,
2712 stdout_id_ctrl_lpa_table(ctrl->lpa));
2713
2714 row = stdout_kv_add(t, "elpe", "%d", ctrl->elpe);
2715 if (verbose)
2716 shr_table_set_row_subtable(t, row,
2717 stdout_id_ctrl_elpe_table(ctrl->elpe));
2718
2719 row = stdout_kv_add(t, "npss", "%d", ctrl->npss);
2720 if (verbose)
2721 shr_table_set_row_subtable(t, row,
2722 stdout_id_ctrl_npss_table(ctrl->npss));
2723
2724 row = stdout_kv_add(t, "avscc", "%#x", ctrl->avscc);
2725 if (verbose)
2726 shr_table_set_row_subtable(t, row,
2727 stdout_id_ctrl_avscc_table(ctrl->avscc));
2728
2729 row = stdout_kv_add(t, "apsta", "%#x", ctrl->apsta);
2730 if (verbose)
2731 shr_table_set_row_subtable(t, row,
2732 stdout_id_ctrl_apsta_table(ctrl->apsta));
2733
2734 row = stdout_kv_add(t, "wctemp", "%d", le16_to_cpu(ctrl->wctemp));
2735 if (verbose)
2736 shr_table_set_row_subtable(t, row,
2737 stdout_id_ctrl_wctemp_table(ctrl->wctemp));
2738
2739 row = stdout_kv_add(t, "cctemp", "%d", le16_to_cpu(ctrl->cctemp));
2740 if (verbose)
2741 shr_table_set_row_subtable(t, row,
2742 stdout_id_ctrl_cctemp_table(ctrl->cctemp));
2743
2744 stdout_kv_add(t, "mtfa", "%d", le16_to_cpu(ctrl->mtfa));
2745 stdout_kv_add(t, "hmpre", "%u", le32_to_cpu(ctrl->hmpre));
2746 stdout_kv_add(t, "hmmin", "%u", le32_to_cpu(ctrl->hmmin));
2747
2748 row = stdout_kv_add(t, "tnvmcap", "%s",
2749 uint128_t_to_l10n_string(
2750 le128_to_cpu(ctrl->tnvmcap)));
2751 if (verbose)
2752 shr_table_set_row_subtable(t, row,
2753 stdout_id_ctrl_tnvmcap_table(ctrl->tnvmcap));
2754
2755 row = stdout_kv_add(t, "unvmcap", "%s",
2756 uint128_t_to_l10n_string(
2757 le128_to_cpu(ctrl->unvmcap)));
2758 if (verbose)
2759 shr_table_set_row_subtable(t, row,
2760 stdout_id_ctrl_unvmcap_table(ctrl->unvmcap));
2761
2762 row = stdout_kv_add(t, "rpmbs", "%#x", le32_to_cpu(ctrl->rpmbs));
2763 if (verbose)
2764 shr_table_set_row_subtable(t, row,
2765 stdout_id_ctrl_rpmbs_table(ctrl->rpmbs));
2766
2767 stdout_kv_add(t, "edstt", "%d", le16_to_cpu(ctrl->edstt));
2768
2769 row = stdout_kv_add(t, "dsto", "%d", ctrl->dsto);
2770 if (verbose)
2771 shr_table_set_row_subtable(t, row,
2772 stdout_id_ctrl_dsto_table(ctrl->dsto));
2773
2774 stdout_kv_add(t, "fwug", "%d", ctrl->fwug);
2775 stdout_kv_add(t, "kas", "%d", le16_to_cpu(ctrl->kas));
2776
2777 row = stdout_kv_add(t, "hctma", "%#x", le16_to_cpu(ctrl->hctma));
2778 if (verbose)
2779 shr_table_set_row_subtable(t, row,
2780 stdout_id_ctrl_hctma_table(ctrl->hctma));
2781
2782 row = stdout_kv_add(t, "mntmt", "%d", le16_to_cpu(ctrl->mntmt));
2783 if (verbose)
2784 shr_table_set_row_subtable(t, row,
2785 stdout_id_ctrl_mntmt_table(ctrl->mntmt));
2786
2787 row = stdout_kv_add(t, "mxtmt", "%d", le16_to_cpu(ctrl->mxtmt));
2788 if (verbose)
2789 shr_table_set_row_subtable(t, row,
2790 stdout_id_ctrl_mxtmt_table(ctrl->mxtmt));
2791
2792 row = stdout_kv_add(t, "sanicap", "%#x", le32_to_cpu(ctrl->sanicap));
2793 if (verbose)
2794 shr_table_set_row_subtable(t, row,
2795 stdout_id_ctrl_sanicap_table(ctrl->sanicap));
2796
2797 stdout_kv_add(t, "hmminds", "%u", le32_to_cpu(ctrl->hmminds));
2798 stdout_kv_add(t, "hmmaxd", "%d", le16_to_cpu(ctrl->hmmaxd));
2799 stdout_kv_add(t, "nsetidmax", "%d", le16_to_cpu(ctrl->nsetidmax));
2800 stdout_kv_add(t, "endgidmax", "%d", le16_to_cpu(ctrl->endgidmax));
2801 stdout_kv_add(t, "anatt", "%d", ctrl->anatt);
2802
2803 row = stdout_kv_add(t, "anacap", "%d", ctrl->anacap);
2804 if (verbose)
2805 shr_table_set_row_subtable(t, row,
2806 stdout_id_ctrl_anacap_table(ctrl->anacap));
2807
2808 stdout_kv_add(t, "anagrpmax", "%u", ctrl->anagrpmax);
2809 stdout_kv_add(t, "nanagrpid", "%u", le32_to_cpu(ctrl->nanagrpid));
2810 stdout_kv_add(t, "pels", "%u", le32_to_cpu(ctrl->pels));
2811 stdout_kv_add(t, "domainid", "%d", le16_to_cpu(ctrl->domainid));
2812
2813 row = stdout_kv_add(t, "kpioc", "%u", ctrl->kpioc);
2814 if (verbose)
2815 shr_table_set_row_subtable(t, row,
2816 stdout_id_ctrl_kpioc_table(ctrl->kpioc));
2817
2818 stdout_kv_add(t, "mptfawr", "%d", le16_to_cpu(ctrl->mptfawr));
2819
2820 row = stdout_kv_add(t, "rmdca", "%#x", ctrl->rmdca);
2821 if (verbose)
2822 shr_table_set_row_subtable(t, row,
2823 stdout_id_ctrl_rmdca_table(ctrl->rmdca));
2824
2825 stdout_kv_add(t, "megcap", "%s",
2826 uint128_t_to_l10n_string(le128_to_cpu(ctrl->megcap)));
2827
2828 row = stdout_kv_add(t, "tmpthha", "%#x", ctrl->tmpthha);
2829 if (verbose)
2830 shr_table_set_row_subtable(t, row,
2831 stdout_id_ctrl_tmpthha_table(ctrl->tmpthha));
2832
2833 row = stdout_kv_add(t, "mupa", "%#x", ctrl->mupa);
2834 if (verbose)
2835 shr_table_set_row_subtable(t, row,
2836 stdout_id_ctrl_mupa_table(ctrl->mupa));
2837
2838 stdout_kv_add(t, "cqt", "%d", le16_to_cpu(ctrl->cqt));
2839
2840 row = stdout_kv_add(t, "cdpa", "%d", le16_to_cpu(ctrl->cdpa));
2841 if (verbose)
2842 shr_table_set_row_subtable(t, row,
2843 stdout_id_ctrl_cdpa_table(ctrl->cdpa));
2844
2845 stdout_kv_add(t, "mup", "%d", le16_to_cpu(ctrl->mup));
2846
2847 row = stdout_kv_add(t, "ipmsr", "%#x", le16_to_cpu(ctrl->ipmsr));
2848 if (verbose)
2849 shr_table_set_row_subtable(t, row,
2850 stdout_id_ctrl_ipmsr_table(ctrl->ipmsr));
2851
2852 stdout_kv_add(t, "msmt", "%#x", le16_to_cpu(ctrl->msmt));
2853 stdout_kv_add(t, "mnens", "%u", le16_to_cpu(ctrl->mnens));
2854 stdout_kv_add(t, "mnecpens", "%u", le16_to_cpu(ctrl->mnecpens));
2855 stdout_kv_add(t, "mensnn", "%u", le32_to_cpu(ctrl->mensnn));
2856
2857 row = stdout_kv_add(t, "ensa", "%#x", ctrl->ensa);
2858 if (verbose)
2859 shr_table_set_row_subtable(t, row,
2860 stdout_id_ctrl_ensa_table(ctrl->ensa));
2861
2862 row = stdout_kv_add(t, "endsfs", "%#x", ctrl->endsfs);
2863 if (verbose)
2864 shr_table_set_row_subtable(t, row,
2865 stdout_id_ctrl_endsfs_table(ctrl->endsfs));
2866
2867 if (NVME_CTRL_CTRATT_VMS(le32_to_cpu(ctrl->ctratt))(((le32_to_cpu(ctrl->ctratt)) >> NVME_CTRL_CTRATT_VMS_SHIFT
) & NVME_CTRL_CTRATT_VMS_MASK)
) {
2868 row = stdout_kv_add(t, "vsen1", "%#x",
2869 le32_to_cpu(ctrl->vsen1));
2870 if (verbose)
2871 shr_table_set_row_subtable(t, row,
2872 stdout_id_ctrl_vsen_table(ctrl->vsen1));
2873
2874 row = stdout_kv_add(t, "vsen2", "%#x",
2875 le32_to_cpu(ctrl->vsen2));
2876 if (verbose)
2877 shr_table_set_row_subtable(t, row,
2878 stdout_id_ctrl_vsen_table(ctrl->vsen2));
2879
2880 row = stdout_kv_add(t, "vsen3", "%#x",
2881 le32_to_cpu(ctrl->vsen3));
2882 if (verbose)
2883 shr_table_set_row_subtable(t, row,
2884 stdout_id_ctrl_vsen_table(ctrl->vsen3));
2885
2886 row = stdout_kv_add(t, "vsen4", "%#x",
2887 le32_to_cpu(ctrl->vsen4));
2888 if (verbose)
2889 shr_table_set_row_subtable(t, row,
2890 stdout_id_ctrl_vsen_table(ctrl->vsen4));
2891
2892 stdout_kv_add(t, "msvmt", "%u", le16_to_cpu(ctrl->msvmt));
2893 }
2894}
2895
2896static void stdout_id_ctrl_nvm_attr(struct nvme_id_ctrl *ctrl,
2897 struct shr_table *t, bool_Bool verbose)
2898{
2899 int row;
2900
2901 if (verbose)
2902 stdout_kv_add(t, "1971:512", "NVM Command Set Attributes");
2903
2904 row = stdout_kv_add(t, "sqes", "%#x", ctrl->sqes);
2905 if (verbose)
2906 shr_table_set_row_subtable(t, row,
2907 stdout_id_ctrl_sqes_table(ctrl->sqes));
2908
2909 row = stdout_kv_add(t, "cqes", "%#x", ctrl->cqes);
2910 if (verbose)
2911 shr_table_set_row_subtable(t, row,
2912 stdout_id_ctrl_cqes_table(ctrl->cqes));
2913
2914 stdout_kv_add(t, "maxcmd", "%d", le16_to_cpu(ctrl->maxcmd));
2915 stdout_kv_add(t, "nn", "%u", le32_to_cpu(ctrl->nn));
2916
2917 row = stdout_kv_add(t, "oncs", "%#x", le16_to_cpu(ctrl->oncs));
2918 if (verbose)
2919 shr_table_set_row_subtable(t, row,
2920 stdout_id_ctrl_oncs_table(ctrl->oncs));
2921
2922 row = stdout_kv_add(t, "fuses", "%#x", le16_to_cpu(ctrl->fuses));
2923 if (verbose)
2924 shr_table_set_row_subtable(t, row,
2925 stdout_id_ctrl_fuses_table(ctrl->fuses));
2926
2927 row = stdout_kv_add(t, "fna", "%#x", ctrl->fna);
2928 if (verbose)
2929 shr_table_set_row_subtable(t, row,
2930 stdout_id_ctrl_fna_table(ctrl->fna));
2931
2932 row = stdout_kv_add(t, "vwc", "%#x", ctrl->vwc);
2933 if (verbose)
2934 shr_table_set_row_subtable(t, row,
2935 stdout_id_ctrl_vwc_table(ctrl->vwc));
2936
2937 stdout_kv_add(t, "awun", "%d", le16_to_cpu(ctrl->awun));
2938 stdout_kv_add(t, "awupf", "%d", le16_to_cpu(ctrl->awupf));
2939
2940 row = stdout_kv_add(t, "icsvscc", "%d", ctrl->icsvscc);
2941 if (verbose)
2942 shr_table_set_row_subtable(t, row,
2943 stdout_id_ctrl_icsvscc_table(ctrl->icsvscc));
2944
2945 row = stdout_kv_add(t, "nwpc", "%d", ctrl->nwpc);
2946 if (verbose)
2947 shr_table_set_row_subtable(t, row,
2948 stdout_id_ctrl_nwpc_table(ctrl->nwpc));
2949
2950 stdout_kv_add(t, "acwu", "%d", le16_to_cpu(ctrl->acwu));
2951
2952 row = stdout_kv_add(t, "ocfs", "%#x", le16_to_cpu(ctrl->ocfs));
2953 if (verbose)
2954 shr_table_set_row_subtable(t, row,
2955 stdout_id_ctrl_ocfs_table(ctrl->ocfs));
2956
2957 row = stdout_kv_add(t, "sgls", "%#x", le32_to_cpu(ctrl->sgls));
2958 if (verbose)
2959 shr_table_set_row_subtable(t, row,
2960 stdout_id_ctrl_sgls_table(ctrl->sgls));
2961
2962 stdout_kv_add(t, "mnan", "%u", le32_to_cpu(ctrl->mnan));
2963 stdout_kv_add(t, "maxdna", "%s",
2964 uint128_t_to_l10n_string(le128_to_cpu(ctrl->maxdna)));
2965 stdout_kv_add(t, "maxcna", "%u", le32_to_cpu(ctrl->maxcna));
2966 stdout_kv_add(t, "oaqd", "%u", le32_to_cpu(ctrl->oaqd));
2967 stdout_kv_add(t, "rhiri", "%d", ctrl->rhiri);
2968 stdout_kv_add(t, "hirt", "%d", ctrl->hirt);
2969 stdout_kv_add(t, "cmmrtd", "%d", le16_to_cpu(ctrl->cmmrtd));
2970 stdout_kv_add(t, "nmmrtd", "%d", le16_to_cpu(ctrl->nmmrtd));
2971 stdout_kv_add(t, "minmrtg", "%d", ctrl->minmrtg);
2972 stdout_kv_add(t, "maxmrtg", "%d", ctrl->maxmrtg);
2973
2974 row = stdout_kv_add(t, "trattr", "%d", ctrl->trattr);
2975 if (verbose)
2976 shr_table_set_row_subtable(t, row,
2977 stdout_id_ctrl_trattr_table(ctrl->trattr));
2978
2979 stdout_kv_add(t, "mcudmq", "%d", le16_to_cpu(ctrl->mcudmq));
2980 stdout_kv_add(t, "mnsudmq", "%d", le16_to_cpu(ctrl->mnsudmq));
2981 stdout_kv_add(t, "mcmr", "%d", le16_to_cpu(ctrl->mcmr));
2982 stdout_kv_add(t, "nmcmr", "%d", le16_to_cpu(ctrl->nmcmr));
2983 stdout_kv_add(t, "mcdqpc", "%d", le16_to_cpu(ctrl->mcdqpc));
2984 stdout_kv_add(t, "subnqn", "%-.*s",
2985 (int)sizeof(ctrl->subnqn), ctrl->subnqn);
2986}
2987
2988static void stdout_id_ctrl_fabric(struct nvme_id_ctrl *ctrl,
2989 struct shr_table *t, bool_Bool verbose)
2990{
2991 int row;
2992
2993 if (verbose)
2994 stdout_kv_add(t, "2047:1972", "Fabric Specific");
2995
2996 stdout_kv_add(t, "ioccsz", "%u", le32_to_cpu(ctrl->ioccsz));
2997 stdout_kv_add(t, "iorcsz", "%u", le32_to_cpu(ctrl->iorcsz));
2998 stdout_kv_add(t, "icdoff", "%d", le16_to_cpu(ctrl->icdoff));
2999
3000 row = stdout_kv_add(t, "fcatt", "%#x", ctrl->fcatt);
3001 if (verbose)
3002 shr_table_set_row_subtable(t, row,
3003 stdout_id_ctrl_fcatt_table(ctrl->fcatt));
3004
3005 stdout_kv_add(t, "msdbd", "%d", ctrl->msdbd);
3006
3007 row = stdout_kv_add(t, "ofcs", "%d", le16_to_cpu(ctrl->ofcs));
3008 if (verbose)
3009 shr_table_set_row_subtable(t, row,
3010 stdout_id_ctrl_ofcs_table(ctrl->ofcs));
3011
3012 row = stdout_kv_add(t, "dctype", "%d", ctrl->dctype);
3013 if (verbose)
3014 shr_table_set_row_subtable(t, row,
3015 stdout_id_ctrl_dctype_table(ctrl->dctype));
3016
3017 stdout_kv_add(t, "ccrl", "%d", ctrl->ccrl);
3018}
3019
3020void stdout_id_ctrl(struct nvme_id_ctrl *ctrl, const char *product_name,
3021 void (*vendor_show)(__u8 *vs, struct json_object *root))
3022{
3023 bool_Bool verbose = stdout_print_ops.flags & VERBOSE;
3024 bool_Bool vs = stdout_print_ops.flags & VS;
3025 struct shr_table *t;
3026 int row;
3027
3028 if (verbose && product_name)
1
Assuming 'verbose' is false
3029 printf("%s\n\n", product_name);
3030 printf("NVME Identify Controller:\n");
3031
3032 t = stdout_kv_table_create();
3033 if (!t)
2
Assuming 't' is non-null
3
Taking false branch
3034 return;
3035
3036 stdout_id_ctrl_cap_feat(ctrl, t, verbose);
3037 stdout_id_ctrl_admin_option(ctrl, t, verbose);
3038 stdout_id_ctrl_nvm_attr(ctrl, t, verbose);
3039 stdout_id_ctrl_fabric(ctrl, t, verbose);
3040
3041 if (verbose
3.1
'verbose' is false
)
4
Taking false branch
3042 stdout_kv_add(t, "3071:2048", "Power State Descriptors");
3043
3044 row = stdout_kv_add(t, "ps", "%d states", ctrl->npss + 1);
3045 /* Unlike the fields above, shown regardless of @verbose. */
3046 shr_table_set_row_subtable(t, row, stdout_id_ctrl_ps_table(ctrl));
5
Calling 'stdout_id_ctrl_ps_table'
3047
3048 stdout_kv_table_finish(t, "identify-controller");
3049
3050 if (verbose)
3051 printf("4095:3072 : Vendor Specific\n");
3052
3053 if (vendor_show)
3054 vendor_show(ctrl->vs, NULL((void*)0));
3055 else if (vs) {
3056 printf("vs[]:\n");
3057 d(ctrl->vs, sizeof(ctrl->vs), 16, 1);
3058 }
3059}
3060
3061static struct shr_table *stdout_id_ctrl_nvm_kpiocap_table(__u8 kpiocap)
3062{
3063 struct shr_table *t;
3064 __u8 rsvd2 = (kpiocap & 0xfc) >> 2;
3065 __u8 kpiosc = NVME_CTRL_KPIOC_KPIOSC(kpiocap)(((kpiocap) >> NVME_CTRL_KPIOC_KPIOSC_SHIFT) & NVME_CTRL_KPIOC_KPIOSC_MASK
)
;
3066 __u8 kpios = NVME_CTRL_KPIOC_KPIOS(kpiocap)(((kpiocap) >> NVME_CTRL_KPIOC_KPIOS_SHIFT) & NVME_CTRL_KPIOC_KPIOS_MASK
)
;
3067
3068 t = stdout_bits_table_create();
3069 if (!t)
3070 return NULL((void*)0);
3071
3072 if (rsvd2)
3073 stdout_bits_add(t, "[7:2]", rsvd2, "Reserved");
3074 stdout_bits_add(t, "[1:1]", kpiosc,
3075 "Key Per I/O capability enabled and disabled %s in the NVM subsystem",
3076 kpiosc ? "all namespaces" : "each namespace");
3077 stdout_bits_add(t, "[0:0]", kpios, "Key Per I/O capability %sSupported",
3078 kpios ? "" : "Not ");
3079
3080 return t;
3081}
3082
3083static struct shr_table *stdout_id_ctrl_nvm_aocs_table(__u16 aocs)
3084{
3085 struct shr_table *t;
3086 __u16 rsvd = (aocs & 0xfffe) >> 1;
3087 __u8 ralbas = aocs & 0x1;
3088
3089 t = stdout_bits_table_create();
3090 if (!t)
3091 return NULL((void*)0);
3092
3093 if (rsvd)
3094 stdout_bits_add(t, "[15:1]", rsvd, "Reserved");
3095 stdout_bits_add(t, "[0:0]", ralbas,
3096 "Reporting Allocated LBA %sSupported",
3097 ralbas ? "" : "Not ");
3098
3099 return t;
3100}
3101
3102static const char *stdout_id_ctrl_nvm_lbamqf_str(__u8 lbamqf)
3103{
3104 switch (lbamqf) {
3105 case NVME_ID_CTRL_NVM_LBAMQF_TYPE_0:
3106 return "LBA Migration Queue Entry Type 0";
3107 case NVME_ID_CTRL_NVM_LBAMQF_VENDOR_MIN ... NVME_ID_CTRL_NVM_LBAMQF_VENDOR_MAX:
3108 return "Vendor Specific";
3109 default:
3110 return "Reserved";
3111 }
3112}
3113
3114void stdout_id_ctrl_nvm(struct nvme_id_ctrl_nvm *ctrl_nvm)
3115{
3116 bool_Bool verbose = stdout_print_ops.flags & VERBOSE;
3117 struct shr_table *t;
3118 __u32 ver;
3119 int row;
3120
3121 printf("NVMe Identify Controller NVM:\n");
3122
3123 t = stdout_kv_table_create();
3124 if (!t)
3125 return;
3126
3127 stdout_kv_add(t, "vsl", "%u", ctrl_nvm->vsl);
3128 stdout_kv_add(t, "wzsl", "%u", ctrl_nvm->wzsl);
3129 stdout_kv_add(t, "wusl", "%u", ctrl_nvm->wusl);
3130 stdout_kv_add(t, "dmrl", "%u", ctrl_nvm->dmrl);
3131 stdout_kv_add(t, "dmrsl", "%u", le32_to_cpu(ctrl_nvm->dmrsl));
3132 stdout_kv_add(t, "dmsl", "%"PRIu64"l" "u", le64_to_cpu(ctrl_nvm->dmsl));
3133
3134 row = stdout_kv_add(t, "kpiocap", "%u", ctrl_nvm->kpiocap);
3135 if (verbose)
3136 shr_table_set_row_subtable(t, row,
3137 stdout_id_ctrl_nvm_kpiocap_table(
3138 ctrl_nvm->kpiocap));
3139
3140 stdout_kv_add(t, "wzdsl", "%u", ctrl_nvm->wzdsl);
3141
3142 row = stdout_kv_add(t, "aocs", "%u", le16_to_cpu(ctrl_nvm->aocs));
3143 if (verbose)
3144 shr_table_set_row_subtable(t, row,
3145 stdout_id_ctrl_nvm_aocs_table(
3146 le16_to_cpu(ctrl_nvm->aocs)));
3147
3148 ver = le32_to_cpu(ctrl_nvm->ver);
3149 if (verbose)
3150 stdout_kv_add(t, "ver",
3151 "0x%x\tNVM command set specification: %d.%d.%d",
3152 ver, NVME_MAJOR(ver)(((ver) >> NVME_VS_MJR_SHIFT) & NVME_VS_MJR_MASK), NVME_MINOR(ver)(((ver) >> NVME_VS_MNR_SHIFT) & NVME_VS_MNR_MASK),
3153 NVME_TERTIARY(ver)(((ver) >> NVME_VS_TER_SHIFT) & NVME_VS_TER_MASK));
3154 else
3155 stdout_kv_add(t, "ver", "0x%x", ver);
3156
3157 if (verbose)
3158 stdout_kv_add(t, "lbamqf", "%u\t0x%x: %s", ctrl_nvm->lbamqf,
3159 ctrl_nvm->lbamqf,
3160 stdout_id_ctrl_nvm_lbamqf_str(ctrl_nvm->lbamqf));
3161 else
3162 stdout_kv_add(t, "lbamqf", "%u", ctrl_nvm->lbamqf);
3163
3164 stdout_kv_table_finish(t, "id-ctrl-nvm");
3165}
3166
3167static struct shr_table *stdout_nvm_id_ns_pic_table(__u8 pic)
3168{
3169 struct shr_table *t;
3170 __u8 rsvd = (pic & 0xF0) >> 4;
3171 __u8 qpifs = (pic & 0x8) >> 3;
3172 __u8 stcrs = (pic & 0x4) >> 2;
3173 __u8 pic_16bpistm = (pic & 0x2) >> 1;
3174 __u8 pic_16bpists = pic & 0x1;
3175
3176 t = stdout_bits_table_create();
3177 if (!t)
3178 return NULL((void*)0);
3179
3180 if (rsvd)
3181 stdout_bits_add(t, "[7:4]", rsvd, "Reserved");
3182 stdout_bits_add(t, "[3:3]", qpifs,
3183 "Qualified Protection Information Format %sSupported",
3184 qpifs ? "" : "Not ");
3185 stdout_bits_add(t, "[2:2]", stcrs,
3186 "Storage Tag Check Read %sSupported",
3187 stcrs ? "" : "Not ");
3188 stdout_bits_add(t, "[1:1]", pic_16bpistm,
3189 "16b Guard Protection Information Storage Tag Mask");
3190 stdout_bits_add(t, "[0:0]", pic_16bpists,
3191 "16b Guard Protection Information Storage Tag %sSupported",
3192 pic_16bpists ? "" : "Not ");
3193
3194 return t;
3195}
3196
3197static struct shr_table *stdout_nvm_id_ns_pifa_table(__u8 pifa)
3198{
3199 struct shr_table *t;
3200 __u8 rsvd = (pifa & 0xF8) >> 3;
3201 __u8 stmla = pifa & 0x7;
3202
3203 t = stdout_bits_table_create();
3204 if (!t)
3205 return NULL((void*)0);
3206
3207 if (rsvd)
3208 stdout_bits_add(t, "[7:3]", rsvd, "Reserved");
3209 stdout_bits_add(t, "[2:0]", stmla,
3210 "Storage Tag Masking Level Attribute : %s",
3211 stmla == 0 ? "Bit Granularity Masking" :
3212 stmla == 1 ? "Byte Granularity Masking" :
3213 stmla == 2 ? "Masking Not Supported" : "Reserved");
3214
3215 return t;
3216}
3217
3218static char *pif_to_string(__u8 pif, bool_Bool qpifs, bool_Bool pif_field)
3219{
3220 switch (pif) {
3221 case NVME_NVM_PIF_16B_GUARD:
3222 return "16b Guard";
3223 case NVME_NVM_PIF_32B_GUARD:
3224 return "32b Guard";
3225 case NVME_NVM_PIF_64B_GUARD:
3226 return "64b Guard";
3227 case NVME_NVM_PIF_QTYPE:
3228 if (pif_field && qpifs)
3229 return "Qualified Type";
3230 default:
3231 return "Reserved";
3232 }
3233}
3234
3235void stdout_nvm_id_ns(struct nvme_nvm_id_ns *nvm_ns, unsigned int nsid,
3236 struct nvme_id_ns *ns, unsigned int lba_index,
3237 bool_Bool cap_only)
3238{
3239 bool_Bool verbose = stdout_print_ops.flags & VERBOSE;
3240 bool_Bool qpifs = (nvm_ns->pic & 0x8) >> 3;
3241 struct shr_table *t;
3242 __u32 elbaf;
3243 __u8 lbaf;
3244 int pif, sts, qpif;
3245 char *in_use = "(in use)";
3246 int i, row;
3247
3248 nvme_id_ns_flbas_to_lbaf_inuse(ns->flbas, &lbaf);
3249
3250 t = stdout_kv_table_create();
3251 if (!t)
3252 return;
3253
3254 if (!cap_only) {
3255 printf("NVMe NVM Identify Namespace %d:\n", nsid);
3256 stdout_kv_add(t, "lbstm", "%#"PRIx64"l" "x",
3257 le64_to_cpu(nvm_ns->lbstm));
3258 } else {
3259 printf("NVMe NVM Identify Namespace for LBA format[%d]:\n",
3260 lba_index);
3261 in_use = "";
3262 }
3263
3264 row = stdout_kv_add(t, "pic", "%#x", nvm_ns->pic);
3265 if (verbose)
3266 shr_table_set_row_subtable(t, row,
3267 stdout_nvm_id_ns_pic_table(nvm_ns->pic));
3268
3269 row = stdout_kv_add(t, "pifa", "%#x", nvm_ns->pifa);
3270 if (verbose)
3271 shr_table_set_row_subtable(t, row,
3272 stdout_nvm_id_ns_pifa_table(nvm_ns->pifa));
3273
3274 stdout_kv_table_finish(t, "nvm-id-ns");
3275
3276 for (i = 0; i < nvme_id_ns_nr_lbaf(ns); i++) {
3277 elbaf = le32_to_cpu(nvm_ns->elbaf[i]);
3278 qpif = (elbaf >> 9) & 0xF;
3279 pif = (elbaf >> 7) & 0x3;
3280 sts = elbaf & 0x7f;
3281 if (verbose)
3282 printf("Extended LBA Format %2d : Qualified Protection "
3283 "Information Format: %s(%d) - Protection "
3284 "Information Format: %s(%d) - Storage Tag Size "
3285 "(MSB): %-2d %s\n", i,
3286 pif_to_string(qpif, qpifs, false0), qpif,
3287 pif_to_string(pif, qpifs, true1), pif, sts,
3288 i == lbaf ? in_use : "");
3289 else
3290 printf("elbaf %2d : qpif:%d pif:%d sts:%-2d %s\n", i,
3291 qpif, pif, sts, i == lbaf ? in_use : "");
3292 }
3293
3294 t = stdout_kv_table_create();
3295 if (!t)
3296 return;
3297
3298 if (ns->nsfeat & 0x20)
3299 stdout_kv_add(t, "npdgl", "%#x", le32_to_cpu(nvm_ns->npdgl));
3300
3301 stdout_kv_add(t, "nprg", "%#x", le32_to_cpu(nvm_ns->nprg));
3302 stdout_kv_add(t, "npra", "%#x", le32_to_cpu(nvm_ns->npra));
3303 stdout_kv_add(t, "nors", "%#x", le32_to_cpu(nvm_ns->nors));
3304 stdout_kv_add(t, "npdal", "%#x", le32_to_cpu(nvm_ns->npdal));
3305 stdout_kv_add(t, "lbapss", "%#x", le32_to_cpu(nvm_ns->lbapss));
3306 stdout_kv_add(t, "tlbaag", "%#x", le32_to_cpu(nvm_ns->tlbaag));
3307
3308 stdout_kv_table_finish(t, "nvm-id-ns");
3309}
3310
3311void stdout_zns_id_ctrl(struct nvme_zns_id_ctrl *ctrl)
3312{
3313 struct shr_table *t;
3314
3315 printf("NVMe ZNS Identify Controller:\n");
3316
3317 t = stdout_kv_table_create();
3318 if (!t)
3319 return;
3320
3321 stdout_kv_add(t, "zasl", "%u", ctrl->zasl);
3322
3323 stdout_kv_table_finish(t, "zns-id-ctrl");
3324}
3325
3326static struct shr_table *show_nvme_id_ns_zoned_zoc_table(__le16 ns_zoc)
3327{
3328 struct shr_table *t;
3329 __u16 zoc = le16_to_cpu(ns_zoc);
3330 __u8 rsvd = (zoc & 0xfffc) >> 2;
3331 __u8 ze = (zoc & 0x2) >> 1;
3332 __u8 vzc = zoc & 0x1;
3333
3334 t = stdout_bits_table_create();
3335 if (!t)
3336 return NULL((void*)0);
3337
3338 if (rsvd)
3339 stdout_bits_add(t, "[15:2]", rsvd, "Reserved");
3340 stdout_bits_add(t, "[1:1]", ze, "Zone Active Excursions: %s",
3341 ze ? "Yes (Host support required)" : "No");
3342 stdout_bits_add(t, "[0:0]", vzc, "Variable Zone Capacity: %s",
3343 vzc ? "Yes (Host support required)" : "No");
3344
3345 return t;
3346}
3347
3348static struct shr_table *show_nvme_id_ns_zoned_ozcs_table(__le16 ns_ozcs)
3349{
3350 struct shr_table *t;
3351 __u16 ozcs = le16_to_cpu(ns_ozcs);
3352 __u8 rsvd = (ozcs & 0xfffc) >> 2;
3353 __u8 razb = ozcs & 0x1;
3354 __u8 zrwasup = (ozcs & 0x2) >> 1;
3355
3356 t = stdout_bits_table_create();
3357 if (!t)
3358 return NULL((void*)0);
3359
3360 if (rsvd)
3361 stdout_bits_add(t, "[15:1]", rsvd, "Reserved");
3362 stdout_bits_add(t, "[0:0]", razb, "Read Across Zone Boundaries: %s",
3363 razb ? "Yes" : "No");
3364 stdout_bits_add(t, "[1:1]", zrwasup, "Zone Random Write Area: %s",
3365 zrwasup ? "Yes" : "No");
3366
3367 return t;
3368}
3369
3370static void stdout_zns_id_ns_recommended_limit(struct shr_table *t,
3371 const char *name, __le32 ns_rl, bool_Bool verbose)
3372{
3373 unsigned int recommended_limit = le32_to_cpu(ns_rl);
3374
3375 if (!recommended_limit && verbose)
3376 stdout_kv_add(t, name, "%s", "Not Reported");
3377 else
3378 stdout_kv_add(t, name, "%u", recommended_limit);
3379}
3380
3381static struct shr_table *stdout_zns_id_ns_zrwacap_table(__u8 zrwacap)
3382{
3383 struct shr_table *t;
3384 __u8 rsvd = (zrwacap & 0xfe) >> 1;
3385 __u8 expflushsup = zrwacap & 0x1;
3386
3387 t = stdout_bits_table_create();
3388 if (!t)
3389 return NULL((void*)0);
3390
3391 if (rsvd)
3392 stdout_bits_add(t, "[7:1]", rsvd, "Reserved");
3393 stdout_bits_add(t, "[0:0]", expflushsup,
3394 "Explicit ZRWA Flush Operations: %s",
3395 expflushsup ? "Yes" : "No");
3396
3397 return t;
3398}
3399
3400void stdout_zns_id_ns(struct nvme_zns_id_ns *ns,
3401 struct nvme_id_ns *id_ns)
3402{
3403 bool_Bool verbose = stdout_print_ops.flags & VERBOSE;
3404 bool_Bool vs = stdout_print_ops.flags & VS;
3405 struct shr_table *t;
3406 uint8_t lbaf;
3407 int i, row;
3408
3409 nvme_id_ns_flbas_to_lbaf_inuse(id_ns->flbas, &lbaf);
3410
3411 printf("ZNS Command Set Identify Namespace:\n");
3412
3413 t = stdout_kv_table_create();
3414 if (!t)
3415 return;
3416
3417 if (verbose) {
3418 row = stdout_kv_add(t, "zoc",
3419 "%u\tZone Operation Characteristics",
3420 le16_to_cpu(ns->zoc));
3421 shr_table_set_row_subtable(t, row,
3422 show_nvme_id_ns_zoned_zoc_table(ns->zoc));
3423 } else {
3424 stdout_kv_add(t, "zoc", "%u", le16_to_cpu(ns->zoc));
3425 }
3426
3427 if (verbose) {
3428 row = stdout_kv_add(t, "ozcs",
3429 "%u\tOptional Zoned Command Support",
3430 le16_to_cpu(ns->ozcs));
3431 shr_table_set_row_subtable(t, row,
3432 show_nvme_id_ns_zoned_ozcs_table(ns->ozcs));
3433 } else {
3434 stdout_kv_add(t, "ozcs", "%u", le16_to_cpu(ns->ozcs));
3435 }
3436
3437 if (verbose) {
3438 if (ns->mar == 0xffffffff)
3439 stdout_kv_add(t, "mar", "%s",
3440 "No Active Resource Limit");
3441 else
3442 stdout_kv_add(t, "mar", "%u\tActive Resources",
3443 le32_to_cpu(ns->mar) + 1);
3444 } else {
3445 stdout_kv_add(t, "mar", "%#x", le32_to_cpu(ns->mar));
3446 }
3447
3448 if (verbose) {
3449 if (ns->mor == 0xffffffff)
3450 stdout_kv_add(t, "mor", "%s",
3451 "No Open Resource Limit");
3452 else
3453 stdout_kv_add(t, "mor", "%u\tOpen Resources",
3454 le32_to_cpu(ns->mor) + 1);
3455 } else {
3456 stdout_kv_add(t, "mor", "%#x", le32_to_cpu(ns->mor));
3457 }
3458
3459 stdout_zns_id_ns_recommended_limit(t, "rrl", ns->rrl, verbose);
3460 stdout_zns_id_ns_recommended_limit(t, "frl", ns->frl, verbose);
3461 stdout_zns_id_ns_recommended_limit(t, "rrl1", ns->rrl1, verbose);
3462 stdout_zns_id_ns_recommended_limit(t, "rrl2", ns->rrl2, verbose);
3463 stdout_zns_id_ns_recommended_limit(t, "rrl3", ns->rrl3, verbose);
3464 stdout_zns_id_ns_recommended_limit(t, "frl1", ns->frl1, verbose);
3465 stdout_zns_id_ns_recommended_limit(t, "frl2", ns->frl2, verbose);
3466 stdout_zns_id_ns_recommended_limit(t, "frl3", ns->frl3, verbose);
3467
3468 stdout_kv_add(t, "numzrwa", "%#x", le32_to_cpu(ns->numzrwa));
3469 stdout_kv_add(t, "zrwafg", "%u", le16_to_cpu(ns->zrwafg));
3470 stdout_kv_add(t, "zrwasz", "%u", le16_to_cpu(ns->zrwasz));
3471
3472 if (verbose) {
3473 row = stdout_kv_add(t, "zrwacap",
3474 "%u\tZone Random Write Area Capability",
3475 ns->zrwacap);
3476 shr_table_set_row_subtable(t, row,
3477 stdout_zns_id_ns_zrwacap_table(ns->zrwacap));
3478 } else {
3479 stdout_kv_add(t, "zrwacap", "%u", ns->zrwacap);
3480 }
3481
3482 stdout_kv_table_finish(t, "zns-id-ns");
3483
3484 for (i = 0; i <= id_ns->nlbaf && i < ARRAY_SIZE(ns->lbafe)(sizeof(ns->lbafe) / sizeof((ns->lbafe)[0]) + 0); i++) {
3485 if (verbose)
3486 printf("LBA Format Extension %2d : Zone Size: %#"PRIx64"l" "x"
3487 " LBAs - Zone Descriptor Extension Size: %-1d "
3488 "bytes%s\n", i, le64_to_cpu(ns->lbafe[i].zsze),
3489 ns->lbafe[i].zdes << 6,
3490 i == lbaf ? " (in use)" : "");
3491 else
3492 printf("lbafe %2d: zsze:%#"PRIx64"l" "x"" zdes:%u%s\n", i,
3493 (uint64_t)le64_to_cpu(ns->lbafe[i].zsze),
3494 ns->lbafe[i].zdes, i == lbaf ? " (in use)" : "");
3495 }
3496
3497 if (vs) {
3498 printf("vs[] :\n");
3499 d(ns->vs, sizeof(ns->vs), 16, 1);
3500 }
3501}
3502
3503void stdout_id_nvmset(struct nvme_id_nvmset_list *nvmset,
3504 unsigned int nvmset_id)
3505{
3506 struct shr_table *t;
3507 int i;
3508
3509 printf("NVME Identify NVM Set List %d:\n", nvmset_id);
3510
3511 t = stdout_kv_table_create();
3512 if (!t)
3513 return;
3514
3515 stdout_kv_add(t, "nid", "%d", nvmset->nid);
3516
3517 stdout_kv_table_finish(t, "id-nvmset");
3518
3519 printf(".................\n");
3520 for (i = 0; i < nvmset->nid && i < ARRAY_SIZE(nvmset->ent)(sizeof(nvmset->ent) / sizeof((nvmset->ent)[0]) + 0); i++) {
3521 printf(" NVM Set Attribute Entry[%2d]\n", i);
3522 printf(".................\n");
3523
3524 t = stdout_kv_table_create();
3525 if (!t)
3526 return;
3527
3528 stdout_kv_add(t, "nvmset_id", "%d",
3529 le16_to_cpu(nvmset->ent[i].nvmsetid));
3530 stdout_kv_add(t, "endurance_group_id", "%d",
3531 le16_to_cpu(nvmset->ent[i].endgid));
3532 stdout_kv_add(t, "random_4k_read_typical", "%u",
3533 le32_to_cpu(nvmset->ent[i].rr4kt));
3534 stdout_kv_add(t, "optimal_write_size", "%u",
3535 le32_to_cpu(nvmset->ent[i].ows));
3536 stdout_kv_add(t, "total_nvmset_cap", "%s",
3537 uint128_t_to_l10n_string(le128_to_cpu(
3538 nvmset->ent[i].tnvmsetcap)));
3539 stdout_kv_add(t, "unalloc_nvmset_cap", "%s",
3540 uint128_t_to_l10n_string(le128_to_cpu(
3541 nvmset->ent[i].unvmsetcap)));
3542
3543 stdout_kv_table_finish(t, "nvm-set-attribute");
3544
3545 printf(".................\n");
3546 }
3547}
3548
3549void stdout_id_ns_granularity_list(
3550 const struct nvme_id_ns_granularity_list *glist)
3551{
3552 struct shr_table *t;
3553 int i;
3554
3555 printf("Identify Namespace Granularity List:\n");
3556
3557 t = stdout_kv_table_create();
3558 if (!t)
3559 return;
3560
3561 stdout_kv_add(t, "Namespace Granularity Attributes (ATTR)",
3562 "%#x", glist->attributes);
3563 stdout_kv_add(t, "Number of Descriptors (NUMD)",
3564 "%d", glist->num_descriptors);
3565
3566 stdout_kv_table_finish(t, "id-ns-granularity-list");
3567
3568 /* Number of Descriptors is a 0's based value */
3569 for (i = 0; i <= glist->num_descriptors && i < ARRAY_SIZE(glist->entry)(sizeof(glist->entry) / sizeof((glist->entry)[0]) + 0);
3570 i++) {
3571 printf("\n Entry[%2d] :\n", i);
3572 printf("................\n");
3573
3574 t = stdout_kv_table_create();
3575 if (!t)
3576 return;
3577
3578 shr_table_set_indent(t, 2);
3579
3580 stdout_kv_add(t, "Namespace Size Granularity (NSG)",
3581 "%#"PRIx64"l" "x",
3582 le64_to_cpu(glist->entry[i].nszegran));
3583 stdout_kv_add(t, "Namespace Capacity Granularity (NCG)",
3584 "%#"PRIx64"l" "x",
3585 le64_to_cpu(glist->entry[i].ncapgran));
3586
3587 stdout_kv_table_finish(t, "id-ns-granularity-list");
3588 }
3589}
3590
3591void stdout_id_uuid_list(const struct nvme_id_uuid_list *uuid_list)
3592{
3593 bool_Bool verbose = stdout_print_ops.flags & VERBOSE;
3594 struct shr_table *t;
3595 int i;
3596
3597 printf("NVME Identify UUID:\n");
3598
3599 for (i = 0; i < NVME_ID_UUID_LIST_MAX; i++) {
3600 __u8 uuid[NVME_UUID_LEN16];
3601 char *association = "";
3602 uint8_t identifier_association =
3603 uuid_list->entry[i].header & 0x3;
3604
3605 /* The list is terminated by a zero UUID value */
3606 if (!memcmp(uuid_list->entry[i].uuid, zero_uuid, NVME_UUID_LEN16))
3607 break;
3608 memcpy(&uuid, uuid_list->entry[i].uuid, NVME_UUID_LEN16);
3609 if (verbose) {
3610 switch (identifier_association) {
3611 case 0x0:
3612 association = "No association reported";
3613 break;
3614 case 0x1:
3615 association = "associated with PCI Vendor ID";
3616 break;
3617 case 0x2:
3618 association =
3619 "associated with PCI Subsystem Vendor ID";
3620 break;
3621 default:
3622 association = "Reserved";
3623 break;
3624 }
3625 }
3626
3627 printf(" Entry[%3d]\n", i + 1);
3628 printf(".................\n");
3629
3630 t = stdout_kv_table_create();
3631 if (!t)
3632 return;
3633
3634 stdout_kv_add(t, "association", "%#x %s",
3635 identifier_association, association);
3636
3637 if (memcmp(uuid_list->entry[i].uuid, invalid_uuid,
3638 sizeof(zero_uuid)) == 0)
3639 stdout_kv_add(t, "UUID", "%s (Invalid UUID)",
3640 shr_uuid_to_string(uuid));
3641 else
3642 stdout_kv_add(t, "UUID", "%s",
3643 shr_uuid_to_string(uuid));
3644
3645 stdout_kv_table_finish(t, "id-uuid-list");
3646
3647 printf(".................\n");
3648 }
3649}
3650
3651void stdout_id_domain_list(struct nvme_id_domain_list *id_dom)
3652{
3653 struct shr_table *t;
3654 int i;
3655
3656 t = stdout_kv_table_create();
3657 if (!t)
3658 return;
3659
3660 stdout_kv_add(t, "Number of Domain Entries", "%u", id_dom->num);
3661
3662 for (i = 0; i < id_dom->num && i < ARRAY_SIZE(id_dom->domain_attr)(sizeof(id_dom->domain_attr) / sizeof((id_dom->domain_attr
)[0]) + 0)
;
3663 i++) {
3664 struct nvme_id_domain_attr *attr = &id_dom->domain_attr[i];
3665 char name[64];
3666
3667 snprintf(name, sizeof(name), "Domain Id for Attr Entry[%u]", i);
3668 stdout_kv_add(t, name, "%u", le16_to_cpu(attr->dom_id));
3669
3670 snprintf(name, sizeof(name),
3671 "Domain Capacity for Attr Entry[%u]", i);
3672 stdout_kv_add(t, name, "%s", uint128_t_to_l10n_string(
3673 le128_to_cpu(attr->dom_cap)));
3674
3675 snprintf(name, sizeof(name),
3676 "Unallocated Domain Capacity for Attr Entry[%u]", i);
3677 stdout_kv_add(t, name, "%s", uint128_t_to_l10n_string(
3678 le128_to_cpu(attr->unalloc_dom_cap)));
3679
3680 snprintf(name, sizeof(name),
3681 "Max Endurance Group Domain Capacity for Attr Entry[%u]",
3682 i);
3683 stdout_kv_add(t, name, "%s", uint128_t_to_l10n_string(
3684 le128_to_cpu(attr->max_egrp_dom_cap)));
3685 }
3686
3687 stdout_kv_table_finish(t, "id-domain-list");
3688}
3689
3690static struct shr_table *stdout_id_iocs_iocsc_table(__u64 iocsc)
3691{
3692 struct shr_table *t;
3693 __u8 cpncs = NVME_GET(iocsc, IOCS_IOCSC_CPNCS)(((iocsc) >> NVME_IOCS_IOCSC_CPNCS_SHIFT) & NVME_IOCS_IOCSC_CPNCS_MASK
)
;
3694 __u8 slmcs = NVME_GET(iocsc, IOCS_IOCSC_SLMCS)(((iocsc) >> NVME_IOCS_IOCSC_SLMCS_SHIFT) & NVME_IOCS_IOCSC_SLMCS_MASK
)
;
3695 __u8 znscs = NVME_GET(iocsc, IOCS_IOCSC_ZNSCS)(((iocsc) >> NVME_IOCS_IOCSC_ZNSCS_SHIFT) & NVME_IOCS_IOCSC_ZNSCS_MASK
)
;
3696 __u8 kvcs = NVME_GET(iocsc, IOCS_IOCSC_KVCS)(((iocsc) >> NVME_IOCS_IOCSC_KVCS_SHIFT) & NVME_IOCS_IOCSC_KVCS_MASK
)
;
3697 __u8 nvmcs = NVME_GET(iocsc, IOCS_IOCSC_NVMCS)(((iocsc) >> NVME_IOCS_IOCSC_NVMCS_SHIFT) & NVME_IOCS_IOCSC_NVMCS_MASK
)
;
3698
3699 t = stdout_bits_table_create();
3700 if (!t)
3701 return NULL((void*)0);
3702
3703 stdout_bits_add(t, "[4:4]", cpncs,
3704 "Computational Programs Namespace Command Set %sSelected",
3705 cpncs ? "" : "Not ");
3706 stdout_bits_add(t, "[3:3]", slmcs,
3707 "Subsystem Local Memory Command Set %sSelected",
3708 slmcs ? "" : "Not ");
3709 stdout_bits_add(t, "[2:2]", znscs,
3710 "Zoned Namespace Command Set %sSelected",
3711 znscs ? "" : "Not ");
3712 stdout_bits_add(t, "[1:1]", kvcs, "Key Value Command Set %sSelected",
3713 kvcs ? "" : "Not ");
3714 stdout_bits_add(t, "[0:0]", nvmcs, "NVM Command Set %sSelected",
3715 nvmcs ? "" : "Not ");
3716
3717 return t;
3718}
3719
3720void stdout_id_iocs(struct nvme_id_iocs *iocs)
3721{
3722 bool_Bool verbose = stdout_print_ops.flags & VERBOSE;
3723 struct shr_table *t;
3724 int row;
3725 __u16 i;
3726
3727 t = stdout_kv_table_create();
3728 if (!t)
3729 return;
3730
3731 for (i = 0; i < ARRAY_SIZE(iocs->iocsc)(sizeof(iocs->iocsc) / sizeof((iocs->iocsc)[0]) + 0); i++) {
3732 char name[48];
3733 __u64 iocsc;
3734
3735 if (!iocs->iocsc[i])
3736 continue;
3737
3738 iocsc = le64_to_cpu(iocs->iocsc[i]);
3739 snprintf(name, sizeof(name), "I/O Command Set Combination[%u]",
3740 i);
3741 row = stdout_kv_add(t, name, "%"PRIx64"l" "x", iocsc);
3742 if (verbose)
3743 shr_table_set_row_subtable(t, row,
3744 stdout_id_iocs_iocsc_table(iocsc));
3745 }
3746
3747 stdout_kv_table_finish(t, "id-iocs");
3748}